Semiconductor device

Abstract

There is provided a semiconductor device that can improve cooling efficiency of Peltier effect elements. A semiconductor device includes: semiconductor elements; Peltier effect elements that are attached to first surfaces of the semiconductor elements without a wiring board; and a package substrate to which the semiconductor elements are attached. A region of the package substrate facing the first surfaces of the semiconductor elements is provided with a first recess or a through hole. The Peltier effect element is disposed in the first recess or in the through hole.

1 . A semiconductor device comprising:
 a semiconductor element;   a Peltier effect element that is attached to a first surface of the semiconductor element without a wiring board; and   a package substrate to which the semiconductor element is attached, wherein a region of the package substrate facing the first surface of the semiconductor element is provided with a first recess or a through hole, and   the Peltier effect element is disposed in the first recess or in the through hole.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the first surface of the semiconductor element is provided with a second recess that faces the first recess or the through hole of the package substrate, and   the Peltier effect element is disposed in the first recess or the through hole and in the second recess.   
     
     
         3 . The semiconductor device according to  claim 1 , further comprising a motherboard to which the package substrate is attached, wherein
 the motherboard is provided with a third recess that faces the through hole of the package substrate, and   the Peltier effect element is disposed in the through hole and in the third recess.   
     
     
         4 . A semiconductor device includes:
 a semiconductor element;   a Peltier effect element that is attached to a first surface of the semiconductor element without a wiring substrate, wherein   the first surface of the semiconductor element is provided with a second recess, and   the Peltier effect element is disposed in the second recess.   
     
     
         5 . The semiconductor device according to  claim 4 , further comprising a motherboard to which the semiconductor element is attached, wherein
 the motherboard is provided with a third recess that faces the second recess of the semiconductor element, and   the Peltier effect element is disposed in the second recess and in the third recess.   
     
     
         6 . A semiconductor device comprising:
 a semiconductor element;   a Peltier effect element that is attached to a first surface of the semiconductor element without a wiring substrate; and   a motherboard that faces the semiconductor element with the Peltier effect element interposed therebetween, wherein   the motherboard is provided with a third recess, and   the Peltier effect element is disposed in the third recess.   
     
     
         7 . The semiconductor device according to  claim 1 , further comprising a conductive adhesive that bonds the Peltier effect element and the first surface of the semiconductor element. 
     
     
         8 . The semiconductor device according to  claim 7 , wherein the conductive adhesive is a solder or silver paste. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein
 the Peltier effect element includes   a thermoelectric semiconductor,   a first electrode that is located between the thermoelectric semiconductor and the semiconductor element and is connected to the thermoelectric semiconductor, and   a second electrode that is located on a side opposite to the first electrode with the thermoelectric semiconductor interposed therebetween and is connected to the thermoelectric semiconductor, and   the first electrode is provided on the first surface.   
     
     
         10 . The semiconductor device according to  claim 1 , further comprising a wiring that connects the semiconductor element and the package substrate,
 wherein a height of the wiring is lower than a height of the Peltier effect element.   
     
     
         11 . The semiconductor device according to  claim 1 , wherein the package substrate is a ceramic substrate or an organic substrate. 
     
     
         12 . The semiconductor device according to  claim 3 , wherein the motherboard is a ceramic substrate or an organic substrate. 
     
     
         13 . The semiconductor device according to  claim 4 , wherein a package format of the semiconductor element is a Wafer Level Chip Scale Package (WLCSP). 
     
     
         14 . The semiconductor device according to  claim 1 , wherein the semiconductor element is a sensor element or an IC element.