Semiconductor device and manufacturing method of semiconductor device

Abstract

A semiconductor device includes: a drift layer of first conductivity type; a well region of second conductivity type on the drift layer; an impurity region of first conductivity type on the well region; a gate trench extending through the impurity region, well region, and drift layer; a termination trench connected to the gate trench, wider than the gate trench; a gate dielectric film on insides of the gate and termination trenches; a first gate electrode inside the gate and termination trenches; a field dielectric film on the first gate electrode in the termination trench, covering above a top corner of the termination trench farther from the gate trench; and a second gate electrode on tops of the field dielectric film and the first gate electrode, overlying the field dielectric film, thereby preventing destruction of the gate dielectric film on the top corner in a lead-out portion.

1 . A semiconductor device comprising:
 a drift layer of a first conductivity type;   a well region of a second conductivity type provided on a surface of the drift layer;   an impurity region of the first conductivity type provided on a surface of the well region;   a gate trench extending from a surface of the impurity region, passing through the well region, and reaching the drift layer;   a termination trench connected to the gate trench, a width of the termination trench in an extension direction of the gate trench being wider than a width of the gate trench in a plan view;   a gate dielectric film provided in contact with inner sides of the gate trench and the termination trench;   a first gate electrode provided on inner walls and bottom surfaces of the gate trench and the termination trench via the gate dielectric film;   a field dielectric film thicker than the gate dielectric film and provided in contact with the first gate electrode provided in the termination trench, to cover above a top corner of the termination trench farther from the gate trench in the extension direction and extending from an inside to an outside of the termination trench; and   a second gate electrode in contact with a top of the field dielectric film and a top of the first gate electrode provided in the termination trench and overlying the field dielectric film from the inside to the outside of the termination trench in the extension direction,   wherein the field dielectric film does not cover above a top corner of the termination trench closer to the gate trench.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the second gate electrode comprises:
 a plurality of second gate electrode lead-out portions provided separately from each other, in contact with the top of the field dielectric film and the top of the first gate electrode provided in the termination trench, and overlying the field dielectric film from the inside to the outside of the termination trench in the extension direction; and   a second gate electrode outer periphery provided above the field dielectric film and in contact with the second gate electrode lead-out portions.   
     
     
         3 . The semiconductor device according to  claim 1 , further comprising a gate pad connected to the second gate electrode via a gate contact hole provided in an interlayer dielectric film outside the termination trench and reaching the second gate electrode. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein the second gate electrode surrounds the gate trench in a plan view. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the width of the termination trench in the extension direction is equal to or less than three times the width of the gate trench. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein a thickness of the field dielectric film is equal to or greater than two times a thickness of the gate dielectric film. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein an upper end of the first gate electrode provided in the termination trench is lower than an upper end of the termination trench in a cross-sectional view. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the first gate electrode and the second gate electrode are made of materials different from each other. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein the gate trench is provided in a stripe or grid shape. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein an electric field relaxation region of the second conductivity type is provided below at least one of the bottom surface of the gate trench and the bottom surface of the termination trench. 
     
     
         11 . A manufacturing method of a semiconductor device, comprising:
 forming a drift layer of a first conductivity type;   providing a well region of a second conductivity type on a surface of the drift layer;   providing an impurity region of the first conductivity type on a surface of the well region;   providing a gate trench extending from a surface of the impurity region, passing through the well region, and reaching the drift layer;   providing a termination trench connected to the gate trench, a width of the termination trench in an extension direction of the gate trench being wider than a width of the gate trench in a plan view;   forming a gate dielectric film in contact with inner walls and bottom surfaces of the gate trench and the termination trench;   forming a first gate electrode inside the gate trench and the termination trench via the gate dielectric film;   forming a field dielectric film made thicker than the gate dielectric film and in contact with the first gate electrode formed in the termination trench, to cover above a top corner of the termination trench farther from the gate trench in the extension direction and extending from an inside to an outside of the termination trench; and   forming a second gate electrode in contact with a top of the field dielectric film and a top of the first gate electrode formed in the termination trench and overlying the field dielectric film from the inside to the outside of the termination trench in the extension direction,   wherein in forming the field dielectric film, the field dielectric film is formed in such a manner as not to cover above a top corner of the termination trench closer to the gate trench.   
     
     
         12 . The manufacturing method of a semiconductor device according to  claim 11 , wherein the field dielectric film is formed by being patterned by reactive ion etching or wet etching. 
     
     
         13 . The manufacturing method of a semiconductor device according to  claim 11 , wherein the field dielectric film is formed by a CVD method. 
     
     
         14 . The manufacturing method of a semiconductor device according to  claim 11 , wherein the first gate electrode is formed to be lower than an upper end of the termination trench in a cross-sectional view by etching back. 
     
     
         15 . The manufacturing method of a semiconductor device according to  claim 11 , the manufacturing method further comprising:
 forming an interlayer dielectric film on the second gate electrode and on the first gate electrode provided in the termination trench;   providing a gate contact hole reaching the second gate electrode in the interlayer dielectric film outside the termination trench; and   forming a gate pad above the second gate electrode and through the gate contact hole.