Semiconductor devices

Abstract

A semiconductor device may include a device isolation layer on a substrate and defining active regions extending a first direction; gate structures intersecting the active regions and extending in a second direction; channel layers spaced apart from each other on the active regions and surrounded by the gate structures; and source/drain regions connected to the channel layers and in recessed regions of the active regions on both sides of the gate structures. First and second regions of the substrate respectively may be spaced apart by a first length and the second length from first ends of the gate structures in the second direction. The second length may be longer than the first length. An upper surface of the device isolation layer may have recessed portion on the first region of the substrate and a flat upper surface on the second region of the substrate.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate including active regions extending in a first direction;   a device isolation layer on the substrate and defining the active regions;   gate structures on the substrate, the gate structures intersecting the active regions and extending in a second direction;   a plurality of channel layers on the active regions and surrounded by the gate structures, the plurality of channel layers being spaced apart from each other in a third direction, the third direction perpendicular to an upper surface of the substrate; and   source/drain regions in recessed regions of the active regions on both sides of the gate structures, the source/drain regions being connected to the plurality of channel layers, wherein   a first region of the substrate is spaced apart from first ends of the gate structures in the second direction by a first length in the second direction,   a second region of the substrate is spaced apart from the first ends of the gate structures by a second length in the second direction,   the second length is longer than the first length,   an upper surface of the device isolation layer on the first region of the substrate has recessed portions, and   the device isolation layer on the second region of the substrate has a flat upper surface.   
     
     
         2 . The semiconductor device of  claim 1 , wherein
 the upper surface of the device isolation layer on the first region has protrusions between the recessed portions, and   a number of the protrusions is identical to a number of gate structures.   
     
     
         3 . The semiconductor device of  claim 2 , wherein
 the protrusions extend from the first ends of the gate structures.   
     
     
         4 . The semiconductor device of  claim 3 , wherein the protrusions extend from the first ends of the gate structures in a direction inclined with respect to the second direction. 
     
     
         5 . The semiconductor device of  claim 1 , wherein
 the upper surface of the device isolation layer in the recessed portions on the first region is a same level as the upper surface of the device isolation layer on the second region.   
     
     
         6 . The semiconductor device of  claim 1 , wherein a depth of the recessed portions ranges from 5 nm to 10 nm. 
     
     
         7 . The semiconductor device of  claim 1 , wherein
 a first active region among the active regions is closest to the first ends of the gate structures,   an upper surface of the first active region has a step portion between the gate structures.   
     
     
         8 . The semiconductor device of  claim 7 , wherein
 the upper surface of the first active region comprises an end region and an inner region sequentially disposed in the second direction from the first ends of the gate structures,   the upper surface of the first active region is a second level in the end region and a third level in the inner region, and   the third level is lower than the second level.   
     
     
         9 . The semiconductor device of  claim 7 , wherein
 the first active region has a protruding region protruding upwardly by the step portion, and   the protruding region of the first active region is spaced apart from an end of the first active region.   
     
     
         10 . The semiconductor device of  claim 1 , wherein
 a third region of the substrate is spaced apart from second ends of the active regions in the first direction by a third length in the first direction,   a fourth region of the substrate is spaced apart from the second ends of the active region by a fourth length in the first direction,   the fourth length is longer than the third length, and   the substrate has recessed portions in an upper surface thereof in the third region, and the substrate has a flat upper surface in the fourth region.   
     
     
         11 . The semiconductor device of  claim 10 , wherein
 the upper surface of the substrate in the third region has protrusions between the recessed portions, and   a number of the protrusions in the upper surface of the substrate is identical to a number of the active regions.   
     
     
         12 . The semiconductor device of  claim 11 , wherein the protrusions extend in the first direction from the second ends of the active regions. 
     
     
         13 . A semiconductor device, comprising:
 a substrate including an active region extending in a first direction;   a device isolation layer defining the active region on the substrate;   a gate structure on the substrate, the gate structure extending in a second direction and intersecting the active region; and   a source/drain region on at least one side of the gate structure, wherein   a first region of the substrate and a second region of the substrate are sequentially disposed in the second direction from a first end of the gate structure in the second direction, and   an upper surface of the device isolation layer on the first region has a protrusion corresponding to the gate structure, and   the device isolation layer on the second region has a flat upper surface.   
     
     
         14 . The semiconductor device of  claim 13 , wherein a level of the protrusion of the device isolation layer on the first region is higher than a level of the upper surface of the device isolation layer on the second region. 
     
     
         15 . The semiconductor device of  claim 13 , wherein a length of the first region is 800 nm to 2000 nm in the second direction from the first end of the gate structure. 
     
     
         16 . The semiconductor device of  claim 13 , wherein
 a third region of the substrate and a fourth region of the substrate are sequentially disposed in the first direction from a second end of the active region in the first direction, and   a protrusion in an upper surface of the substrate on the third region corresponds to the active region, and   an upper surface of the substrate on the fourth region is flat.   
     
     
         17 . A semiconductor device, comprising:
 a substrate including active regions extending in a first direction;   a device isolation layer on the substrate and defining the active regions;   gate structures on the substrate, the gate structures intersecting the active regions and extending in a second direction;   a plurality of channel layers on the active regions and surrounded by the gate structure, the plurality of channel layer being spaced apart from each other in a third direction, the third direction perpendicular to an upper surface of the substrate; and   source/drain regions in recessed regions of the active regions at both sides of the gate structures, and the source/drain regions being connected to the plurality of channel layers, wherein   among the active regions, an upper surface of an active region closest to ends of the gate structures in the second direction has a step portion between the gate structures.   
     
     
         18 . The semiconductor device of  claim 17 , wherein
 a first region of the substrate is adjacent to the ends of the gate structures in the second direction, and   a second region of the substrate is spaced apart from the ends of the gate structures in the second direction, and   an upper surface of the device isolation layer on the first region of the substrate has protrusions corresponding to the gate structures and recessed portions between the protrusions.   
     
     
         19 . The semiconductor device of  claim 18 , wherein
 the protrusions in the upper surface of the device isolation layer on the first region of the substrate are on a straight line with the gate structures in the second direction, or   the protrusions in the upper surface of the device isolation layer on the first region of the substrate are shifted from the straight line in the first direction.   
     
     
         20 . The semiconductor device of  claim 18 , wherein an upper surface of the device isolation layer on the second region is flat.