Solid-state imaging element, manufacturing method, and electronic device

Abstract

The present disclosure relates to a solid-state imaging element, a manufacturing method, and an electronic device capable of achieving higher performance. In the solid-state imaging element, a second semiconductor substrate is bonded to a first semiconductor substrate provided with a photodiode and some pixel transistors for each pixel, the second semiconductor substrate being provided with pixel transistors other than the some pixel transistors constituting the pixel, an interlayer film is stacked on a surface of the second semiconductor substrate via an insulating film, the surface being opposite to a surface on a side to which the first semiconductor substrate is bonded, and a through electrode penetrating the second semiconductor substrate from the interlayer film side and electrically connected to the first semiconductor substrate is provided. The through electrode includes a lower electrode provided from substantially the same height as the surface of the second semiconductor substrate on the interlayer film side toward the second semiconductor substrate, and an upper electrode penetrating the interlayer film and connected to the lower electrode. The present technology can be applied to, for example, a back-illuminated CMOS image sensor having a stacked structure.

1 . A solid-state imaging element comprising:
 a first semiconductor substrate provided with a photodiode and some pixel transistors for each pixel;   a second semiconductor substrate bonded to the first semiconductor substrate and provided with another pixel transistor other than the some pixel transistors constituting the pixel;   an interlayer film stacked on a surface of the second semiconductor substrate via an insulating film, the surface being opposite to a surface on a side to which the first semiconductor substrate is bonded; and   a through electrode that penetrates the second semiconductor substrate from the interlayer film side and is electrically connected to the first semiconductor substrate,   wherein the through electrode includes a lower electrode provided from substantially the same height as a surface of the second semiconductor substrate on the interlayer film side toward the second semiconductor substrate, and an upper electrode penetrating the interlayer film and connected to the lower electrode.   
     
     
         2 . The solid-state imaging element according to  claim 1 ,
 wherein an insulating layer is provided between the lower electrode and the second semiconductor substrate.   
     
     
         3 . The solid-state imaging element according to  claim 1 ,
 wherein an interlayer insulating film is provided between the semiconductor layer of the first semiconductor substrate and the semiconductor layer of the second semiconductor substrate and a part of the lower electrode is held by the interlayer insulating film, and   an air gap is provided between the lower electrode and the second semiconductor substrate.   
     
     
         4 . The solid-state imaging element according to  claim 1 ,
 wherein a diameter of the lower electrode is larger than a diameter of the upper electrode.   
     
     
         5 . The solid-state imaging element according to  claim 1 ,
 wherein the lower electrode has a shape in which an upper surface of the lower electrode is higher than a height of a surface of the second semiconductor substrate on the interlayer film side and lower than a gate electrode of an element provided on the second semiconductor substrate.   
     
     
         6 . The solid-state imaging element according to  claim 1 ,
 wherein the lower electrode has a shape in which an upper surface of the lower electrode is lower than a height of a surface of the second semiconductor substrate on the interlayer film side.   
     
     
         7 . The solid-state imaging element according to  claim 1 ,
 wherein in a case where the first semiconductor substrate and the second semiconductor substrate are at the same potential, the upper electrode constituting the through electrode is configured in a shape connected also to the second semiconductor substrate, the through electrode supplying a potential to the first semiconductor substrate and the second semiconductor substrate.   
     
     
         8 . The solid-state imaging element according to  claim 1 ,
 wherein the lower electrode is configured in a staircase shape in which at least a part of a diameter is different from a diameter of another part.   
     
     
         9 . A method of manufacturing a solid-state imaging element, the method comprising:
 bonding a second semiconductor substrate to a first semiconductor substrate provided with a photodiode and some pixel transistors for each pixel, the second semiconductor substrate being provided with another pixel transistor other than the some pixel transistors constituting the pixel;   stacking an interlayer film on a surface of the second semiconductor substrate via an insulating film, the surface being opposite to a surface on a side to which the first semiconductor substrate is bonded; and   forming a through electrode that penetrates the second semiconductor substrate from the interlayer film side and is electrically connected to the first semiconductor substrate,   wherein the through electrode includes a lower electrode provided from substantially the same height as a surface of the second semiconductor substrate on the interlayer film side toward the second semiconductor substrate, and an upper electrode penetrating the interlayer film and connected to the lower electrode.   
     
     
         10 . An electronic device including a solid-state imaging element, the solid-state imaging element comprising:
 a first semiconductor substrate provided with a photodiode and some pixel transistors for each pixel;   a second semiconductor substrate bonded to the first semiconductor substrate and provided with another pixel transistor other than the some pixel transistors constituting the pixel;   an interlayer film stacked on a surface of the second semiconductor substrate via an insulating film, the surface being opposite to a surface on a side to which the first semiconductor substrate is bonded; and   a through electrode that penetrates the second semiconductor substrate from the interlayer film side and is electrically connected to the first semiconductor substrate,   wherein the through electrode includes a lower electrode provided from substantially the same height as a surface of the second semiconductor substrate on the interlayer film side toward the second semiconductor substrate, and an upper electrode penetrating the interlayer film and connected to the lower electrode.