Method and apparatus for performing periodic task
Abstract
The present disclosure relates to a method and an apparatus for performing periodic task. A method ( 100 ) for performing a periodic task may comprise: determining (S 102 ) a time unit, based on a time period needed for scanning a first random access memory. RAM: scanning (S 104 ) circularly the first RAM; and performing (S 106 ) a task with a predetermined periodicity, based at least on a cycle number for scanning the first RAM. The cycle number is determined, based on the time unit and the predetermined periodicity. According to embodiments of the present disclosure, an improvement for performing a periodic task may be provided. Particularly, embodiments of the present disclosure may be applied not only in slow and small-scale periodicities, but also applicable even when the periodicities have values varying in a large range, and/or when some periodicities have very small values.
Claims
exact text as granted — not AI-modified1 . A method for performing a periodic task, comprising:
determining a time unit, based on a time period needed for scanning a first random access memory, RAM; scanning circularly the first RAM; and performing a task with a predetermined periodicity, based at least on a cycle number for scanning the first RAM; wherein the cycle number is determined, based on the time unit and the predetermined periodicity.
2 . The method according to claim 1 , wherein the time period is needed for scanning a first RAM one time.
3 . The method according to claim 1 , wherein the cycle number equals to the predetermined periodicity divided by the time unit.
4 . The method according to claim 1 , wherein the cycle number is stored in a second RAM.
5 . The method according to claim 1 , wherein scanning the first RAM comprises:
reading a value stored in a memory unit in the first RAM; comparing the value to the cycle number; and incrementing the value, and writing the incremented value to the memory unit, if the value is less than the cycle number.
6 . The method according to claim 5 , wherein the task is performed, if the value is greater than or equal to the cycle number.
7 . The method according to claim 1 , wherein the first RAM comprises a plurality of memory units, with each memory unit being used for one task.
8 . The method according to claim 7 , wherein the plurality of memory units are scanned sequentially or in parallel, during each cycle for scanning the first RAM.
9 . The method according to claim 7 , wherein scanning the first RAM comprises:
sequentially reading m values stored respectively in m memory units in the plurality of memory units; wherein m is an integer; sequentially writing m incremented or reset values respectively to the m memory units; wherein following actions are performed in parallel with the sequentially reading action and/or the sequentially writing actions; for an ith value stored in an ith memory unit, wherein i is an integer equal to or greater than 1, and equal to or less than m, comparing the ith value to a corresponding ith cycle number; and incrementing the ith value, if the ith value is less than the ith cycle number; or resetting the ith value, if the ith value is equal to or greater than the ith cycle number.
10 . The method according to claim 9 , wherein an ith task corresponding to the ith memory unit is performed, if the ith value is equal to or greater than the ith cycle number.
11 . The method according to claim 9 ,
wherein a comparing step, an incrementing step, and/or a resetting step for the ith value are performed in parallel with a reading step, a comparing step, an incrementing step, a resetting step and/or a writing step for a jth value; and wherein j is an integer equal to or greater than 1, equal to or less than m, and different from i.
12 . The method according to claim 9 , wherein m+1 is a number of clock cycles needed to sequentially perform a reading step, a comparing step, an incrementing step or a resetting step, and a writing step for one value stored in one memory unit.
13 . The method according to claim 9 ,
wherein the first RAM comprises a plurality of groups, each group including m memory units; and wherein the plurality of groups are scanned sequentially.
14 . The method according to claim 9 ,
wherein the time unit equals to 2*k*clock cycle period, when k is greater than or equal to 2*m; and wherein k is a total number of memory units in the first RAM.
15 . The method according to claim 1 , wherein the first RAM is associated with a field programmable gate array, FPGA, or an application specific integrated circuit, ASIC.
16 . The method according to claim 1 ,
wherein the task comprises transmitting data packets periodically; or wherein the task comprises transmitting a report periodically: or wherein the task comprises detecting a timeout of a report periodically.
17 . An apparatus for performing a periodic task, comprising:
a processor; and a memory; wherein the processor is configured for:
determining a time unit, based on a time period needed for scanning a first random access memory, RAM;
scanning circularly the first RAM; and
performing a task with a predetermined periodicity, based at least on a cycle number for scanning the first RAM;
wherein the cycle number is determined, based on the time unit and the predetermined periodicity.
18 . The apparatus according to claim 17 , wherein the time period is needed for scanning a first RAM one time.
19 . A computer readable storage medium having a computer program stored thereon, the computer program executable by an apparatus to cause the apparatus to:
determine a time unit, based on a time period needed for scanning a first random access memory, RAM; scan circularly the first RAM; and perform a task with a predetermined periodicity, based at least on a cycle number for scanning the first RAM; wherein the cycle number is determined, based on the time unit and the predetermined periodicity.
20 . The apparatus of claim 18 , wherein the cycle number equals to the predetermined periodicity divided by the time unit.Join the waitlist — get patent alerts
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