Semiconductor devices, three-dimensional memory devices, and methods for forming the same
Abstract
A semiconductor device includes a semiconductor layer, a stack structure over the semiconductor layer, a first contact structure, and a second contact structure. The stack structure includes alternating first layers and first dielectric layers. The stack structure includes a first portion and a second portion adjacent to the first portion, the first layers of the first portion include second dielectric layers, and the first layers of the second portion include conductive layers. The first contact structure extends through the first portion and the semiconductor layer. The second contact structure extends through a part of the first portion and connects with one of the conductive layers.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device, comprising:
a semiconductor layer; a stack structure over the semiconductor layer and comprising alternating first layers and first dielectric layers, wherein the stack structure comprises a first portion and a second portion adjacent to the first portion, the first layers of the first portion comprise second dielectric layers, and the first layers of the second portion comprise conductive layers; a first contact structure extending through the first portion and the semiconductor layer; and a second contact structure extending through a part of the first portion and connecting with one of the conductive layers.
2 . The semiconductor device of claim 1 , wherein:
the first contact structure comprises a first segment and a second segment connected with the first segment in a first direction, the first segment comprises a first end contacting the second segment, and the second segment comprises a second end contacting the first segment, wherein a size of the first end is greater than a size of the second end in a second direction perpendicular to the first direction.
3 . The semiconductor device of claim 2 , wherein the first segment further comprises a third end away from the first end, and the second segment further comprises a fourth end away from the second end, wherein a size of the third end is greater than a size of the first end in the second direction, and a size of the second end is greater than a size of the fourth end in the second direction.
4 . The semiconductor device of claim 2 , wherein the first segment is located on a side of the second segment away from the semiconductor layer.
5 . The semiconductor device of claim 1 , wherein:
the second contact structure comprises a vertical contact structure and a lateral contact structure connecting to the vertical contact structure, and the vertical contact structure extends in a same direction as the first contact structure, wherein the lateral contact structure connects with the one of the conductive layers.
6 . The semiconductor device of claim 5 , wherein:
the first contact structure comprises a first joint in a first stack pair, and the vertical contact structure extends to the first stack pair, wherein the first stack pair is a pair comprising one of the first dielectric layers and one of the first layers in contact with the one of the first dielectric layers.
7 . The semiconductor device of claim 6 , further comprising a third contact structure extending through a portion of the first portion, wherein the third contact structure is connected with a second stack pair, and the first contact structure comprises a second joint in the second stack pair.
8 . The semiconductor device of claim 1 , wherein:
the first contact structure comprises a first conductor layer and a first spacer surrounding the first conductor layer; and the second contact structure comprises a second conductor layer and a second spacer surrounding the second conductor layer, wherein the first spacer and the second spacer comprise a same material, and the first conductor layer and the second conductor layer comprise a same material.
9 . The semiconductor device of claim 8 , wherein the first contact structure further comprises a first filler body surrounded by the first conductor layer.
10 . The semiconductor device of claim 9 , wherein the second contact structure further comprises a second filler body surrounded by the second conductor layer, and the first filler body and the second filler body comprise a same material.
11 . The semiconductor device of claim 1 , further comprising channel structures extending through the second portion into the semiconductor layer.
12 . The semiconductor device of claim 11 , wherein:
in a vertical direction, a length of the first contact structure is greater than a length of the channel structures.
13 . The semiconductor device of claim 11 , wherein:
the second portion comprises a first part and a second part separated from the first part, wherein the first portion connects the first part and the second part.
14 . The semiconductor device of claim 1 , further comprising a peripheral circuit connected with the first contact structure.
15 . The semiconductor device of claim 14 , further comprising a first connection layer and a second connection layer, the first connection layer connected with the first contact structure, the second connection layer connected with the peripheral circuit,
wherein the first connection layer is bonded with the second connection layer.
16 . The semiconductor device of claim 14 , wherein the peripheral circuit is disposed under the stack structure, and the first contact structure extends through the semiconductor layer to connect with the peripheral circuit.
17 . A memory device, comprising:
a first semiconductor structure, comprising:
a first stack structure comprising alternating first and second dielectric layers; and
a first contact structure extending through the first stack structure;
a second semiconductor structure, comprising:
a second stack structure comprising alternating third and four dielectric layers; and
a second contact structure extending through the second stack structure; and
a first peripheral circuit connected with the first contact structure and the second contact structure.
18 . The memory device of claim 17 , wherein the first peripheral circuit is bonded with the first semiconductor structure, and the first peripheral circuit comprises a first connect structure between the first semiconductor structure and the second semiconductor structure.
19 . The memory device of claim 17 , further comprising a second peripheral circuit bonded with the second semiconductor structure, wherein the second peripheral circuit comprises a second connect structure connecting the second contact structure.
20 . A method of forming a semiconductor device, comprising:
forming a stack structure comprising alternating first and second dielectric layers; forming a first contact hole extending through the stack structure; forming second contact holes extending through a part of the stack structure during the formation of the first contact hole; forming a first contact structure in the first contact hole; and forming second contact structures in the second contact holes, respectively, during the formation of the first contact structure.Join the waitlist — get patent alerts
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