Device and method to control warpage and thermal dissipation in an optical engine

Abstract

Novel tools and techniques are provided for implementing a semiconductor or optical engine package, and more particularly methods, systems, and apparatuses are provided for implementing a semiconductor package including a dummy die coupled to a top surface of a fan-out wafer comprising an electronic die and coupled to a side of a photonic die. In various embodiments, an apparatus includes a first layer comprising an electronic die. A photonic die can be stacked on and coupled to the electronic die and a dummy die can be coupled to a first side of the photonic die and coupled to the first layer.

What is claimed is: 
     
         1 . An apparatus comprising:
 a first layer comprising an electronic die;   a photonic die disposed on the first layer, wherein a first length of the photonic die overlapping the first layer is less than a second length of the first layer; and   a dummy die disposed on a first side of the photonic die and disposed on the first layer.   
     
     
         2 . The apparatus of  claim 1 , wherein a first thickness of the photonic die is about a same thickness as a second thickness of the dummy die. 
     
     
         3 . The apparatus of  claim 1 , wherein the dummy die extends along an entire thickness of the photonic die. 
     
     
         4 . The apparatus of  claim 1 , wherein the electronic die is embedded in the first layer. 
     
     
         5 . The apparatus of  claim 1 , further comprising an opening between a second side of the dummy die and the first side of the photonic die, wherein the opening is between about 60 μm to about 70 μm. 
     
     
         6 . The apparatus of  claim 1 , further comprising an opening between a second side of the dummy die and the first side of the photonic die, wherein the opening is filled with a second material. 
     
     
         7 . The apparatus of  claim 6 , wherein the first length of the photonic die, a third length of the dummy die, and a fourth length of the opening combined are about a same length as the second length of the first layer. 
     
     
         8 . The apparatus of  claim 1 , wherein the first length of the photonic die and a third length of the dummy die combined are about a same length as the second length of the first layer. 
     
     
         9 . The apparatus of  claim 1 , wherein a ratio of the first length of the photonic die to a third length of the dummy die is about 3:1 to about 4:1. 
     
     
         10 . The apparatus of  claim 1 , wherein the dummy die comprises a via extending from a first surface of the dummy die to a second surface of the dummy die. 
     
     
         11 . The apparatus of  claim 1 , wherein the dummy die comprises a connector located at an interface of the first layer and the dummy die, wherein the connector is configured to couple the dummy die to the first layer. 
     
     
         12 . The apparatus of  claim 1 , wherein a second material is located between at least one of the dummy die and the photonic die, the dummy die and the first layer, or the photonic die and the first layer. 
     
     
         13 . A method of manufacturing an optical engine, the method comprising:
 forming an electronic die;   encapsulating the electronic die in a first material;   coupling a photonic die to the electronic die encapsulated in the first material, wherein a first length of the photonic die overlapping the electronic die encapsulated in the first material is less than a second length of the electronic die encapsulated in the first material; and   coupling a dummy die to a first side of the photonic die and to the electronic die encapsulated in the first material.   
     
     
         14 . The method of  claim 13 , wherein, before the electronic die is encapsulated in the first material, the method includes coupling the electronic die to a carrier wafer. 
     
     
         15 . The method of  claim 14 , wherein, after coupling the electronic die to the carrier wafer, the electronic die is encapsulated in the first material. 
     
     
         16 . The method of  claim 13 , wherein, the electronic die is formed in a fan-out wafer, and wherein, after coupling the photonic die to the electronic die encapsulated in the first material, the method further comprises:
 removing a carrier wafer coupled to the electronic die; and   dicing the fan-out wafer to separate the electronic die, the photonic die, and the dummy die from one or more other components formed on the fan-out wafer.   
     
     
         17 . The method of  claim 13 , wherein the method further comprises filling an opening between at least one of the electronic die and the photonic die, the electronic die and the dummy die, or the photonic die and the dummy die with a second material. 
     
     
         18 . The method of  claim 13 , wherein a first thickness of the photonic die is about a same thickness as a second thickness of the dummy die. 
     
     
         19 . An optical engine comprising:
 a wafer comprising an electronic die embedded in a layer of the wafer;   a photonic die disposed on the electronic die, wherein a first length of the photonic die overlapping the wafer is less than a second length of the wafer; and   a dummy die disposed on a first side of the photonic die and disposed on the wafer.   
     
     
         20 . The optical engine of  claim 19 , wherein the first length of the photonic die and a third length of the dummy die combined are about a same length as the second length of the wafer.