Printed circuit board

Abstract

A printed circuit board includes a wiring portion including one or more insulating layers, one or more wiring layers respectively disposed on or in the one or more insulating layers, a first pad disposed on a lowermost insulating layer, of the one or more insulating layers, and a second pad disposed on an uppermost insulating layer, of the one or more insulating layers, a first solder resist layer disposed on a lower side of the wiring portion to cover at least a portion of the first pad, the first solder resist layer having a first opening, on the first pad, a second solder resist layer disposed on an upper side of the wiring portion to cover at least a portion of the second pad, a first surface treatment layer disposed on at least a portion of the first pad, and a barrier layer disposed on the first solder resist layer.

What is claimed is: 
     
         1 . A printed circuit board comprising:
 a wiring portion including one or more insulating layers, one or more wiring layers respectively disposed on or in the one or more insulating layers, a first pad disposed on a lowermost insulating layer of the one or more insulating layers, and a second pad disposed on an uppermost insulating layer of the one or more insulating layers;   a first solder resist layer disposed on a lower side of the wiring portion to cover at least a portion of the first pad, the first solder resist layer having a first opening, on the first pad;   a second solder resist layer disposed on an upper side of the wiring portion to cover at least a portion of the second pad;   a first surface treatment layer disposed on at least a portion of the first pad; and   a barrier layer disposed on the first solder resist layer,   wherein a thickness of the barrier layer is less than a thickness of the first pad.   
     
     
         2 . The printed circuit board of  claim 1 , wherein the barrier layer is disposed on a lower surface of the first solder resist layer. 
     
     
         3 . The printed circuit board of  claim 2 , wherein the barrier layer is disposed along an inner wall of the first opening and at least a portion of the first surface treatment layer. 
     
     
         4 . The printed circuit board of  claim 1 , wherein the first solder resist layer covers at least a portion of an upper surface of the first pad. 
     
     
         5 . The printed circuit board of  claim 1 , wherein the second solder resist layer has a second opening disposed on the second pad. 
     
     
         6 . The printed circuit board of  claim 5 , further comprising:
 a metal post disposed in the second opening, the metal post disposed on at least a portion of the second pad.   
     
     
         7 . The printed circuit board of  claim 6 , further comprising:
 a second surface treatment layer disposed on the metal post.   
     
     
         8 . The printed circuit board of  claim 6 , further comprising:
 a first semiconductor chip disposed on the metal post; and   a connection member connecting the metal post and the first semiconductor chip to each other.   
     
     
         9 . The printed circuit board of  claim 1 , wherein a thickness of the barrier layer is less than a thickness of the first surface treatment layer. 
     
     
         10 . The printed circuit board of  claim 9 , wherein the thickness of the barrier layer is less than 100 nm. 
     
     
         11 . A printed circuit board comprising:
 a wiring portion including one or more insulating layers, one or more wiring layers respectively disposed on or in the one or more insulating layers, a first pad disposed on a lowermost insulating layer of the one or more insulating layers, and a second pad disposed on an uppermost insulating layer of the one or more insulating layers;   a first solder resist layer disposed on a lower side of the wiring portion to cover at least a portion of the first pad, the first solder resist layer having a first opening, on the first pad;   a second solder resist layer disposed on an upper side of the wiring portion to cover at least a portion of the second pad;   a first surface treatment layer disposed on at least a portion of the first pad; and   a barrier layer disposed on the first solder resist layer,   wherein the barrier layer includes an inorganic oxide film.   
     
     
         12 . The printed circuit board of  claim 11 , wherein the barrier layer includes at least one of Al 2 O 3 , TiO 2 , ZnO, and SiO 2 . 
     
     
         13 . The printed circuit board of  claim 11 , wherein the barrier layer is disposed on a lower surface of the first solder resist layer. 
     
     
         14 . The printed circuit board of  claim 13 , wherein the barrier layer is disposed along an inner wall of the first opening and at least a portion of the first surface treatment layer. 
     
     
         15 . The printed circuit board of  claim 12 , further comprising:
 a metal post disposed on at least a portion of the second pad.   
     
     
         16 . The printed circuit board of  claim 11 , wherein a thickness of the barrier layer is less than a thickness of the first pad. 
     
     
         17 . The printed circuit board of  claim 11 , wherein the second solder resist layer has a second opening disposed on the second pad. 
     
     
         18 . The printed circuit board of  claim 11 , wherein the first and second solder resist layers include a thermosetting resin, wherein an inorganic filler is dispersed in the thermosetting resin 
     
     
         19 . The printed circuit board of  claim 11 , wherein the first and second solder resist layers include a photosensitive insulating resin.