Package structure
Abstract
A package structure is provided. The package structure includes a first package component mounted on a substrate, a lid structure disposed on the substrate and around the first package component, and a thermal interface material vertically sandwiched between the plurality of integrated circuit dies of the first package component and the lid structure. The first package component includes a plurality of integrated circuit dies and an underfill formed between the integrated circuit dies. The lid structure covers the integrated circuit dies and exposes the underfill. A first portion and a second portion of the thermal interface material are laterally separated from each other, and a space between the first portion and the second portion is exposed from the lid structure.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A package structure, comprising:
a first package component mounted on a substrate, wherein the first package component comprises a plurality of integrated circuit dies and an underfill formed between the integrated circuit dies; a lid structure disposed on the substrate and around the first package component, wherein the lid structure covers the integrated circuit dies and exposes the underfill; and a thermal interface material vertically sandwiched between the plurality of integrated circuit dies of the first package component and the lid structure, wherein a first portion and a second portion of the thermal interface material are laterally separated from each other, and a space between the first portion and the second portion is exposed from the lid structure.
2 . The package structure as claimed in claim 1 , further comprising an electronic component disposed on the substrate, wherein the lid structure has a first foot and a second foot, the first foot and the second foot extend toward the substrate, the electronic component is covered by the lid structure and located between the first foot and the second foot.
3 . The package structure as claimed in claim 2 , wherein the lid structure further has a body connected to the first foot and the second foot, and the body is spaced from the electronic component.
4 . The package structure as claimed in claim 2 , wherein the lid structure further has a third foot disposed between the first foot and the second foot.
5 . The package structure as claimed in claim 2 , wherein a width of the first foot is different from a width of the second foot.
6 . The package structure as claimed in claim 1 , further comprising an encapsulant formed around the plurality of integrated circuit dies and the underfill, wherein the thermal interface material is located directly over the encapsulant.
7 . The package structure as claimed in claim 1 , wherein an edge of the lid structure is substantially aligned with an edge of the thermal interface material.
8 . A package structure, comprising:
a first package component mounted on a substrate; a lid structure disposed on the substrate and around the first package component, wherein the lid structure exposes a top surface of an underfill of the first package component, wherein the lid structure is free from direct contact with the underfill; and a thermal interface material located between the first package component and the lid structure, wherein the thermal interface material is disposed without overlapping the top surface of the underfill.
9 . The package structure as claimed in claim 8 , wherein the lid structure has a first foot and a second foot, the first foot and the second foot extend below the top surface of the underfill.
10 . The package structure as claimed in claim 9 , wherein the second foot is located between the first foot and the underfill.
11 . The package structure as claimed in claim 9 , wherein the lid structure further has a body connected to the first foot and the second foot, and the body overlaps the thermal interface material.
12 . The package structure as claimed in claim 11 , wherein an edge of the body is substantially aligned with an edge of the thermal interface material.
13 . The package structure as claimed in claim 9 , further comprising an adhesive material disposed on the first foot and the second foot and in contact with the substrate.
14 . The package structure as claimed in claim 8 , wherein in a direction perpendicular to a normal direction of the substrate, a distance between an edge of the lid structure and an edge of the thermal interface material is ranged from 0 to about 10 mm.
15 . A package structure, comprising:
a first package component mounted on a substrate; a lid structure disposed on the substrate and around the first package component, wherein the lid structure has a first opening that exposes a top surface of an underfill of the first package component; and a thermal interface material located between the first package component and the lid structure, wherein the thermal interface material has a second opening that exposes the top surface of the underfill, and an edge of the first opening is substantially aligned with an edge of the second opening.
16 . The package structure as claimed in claim 15 , wherein the lid structure has a first foot and a second foot, the first foot and the second foot extend below the top surface of the underfill and connected to the substrate.
17 . The package structure as claimed in claim 16 , wherein a height of the first foot is substantially equal to a height of the second foot in a normal direction of the substrate.
18 . The package structure as claimed in claim 15 , wherein a depth of the first opening is greater than a depth of the second opening in a normal direction of the substrate.
19 . The package structure as claimed in claim 15 , wherein the lid structure comprises a plurality of sections separated from each other via the first opening.
20 . The package structure as claimed in claim 15 , wherein the first package component comprises a plurality of integrated circuit dies and an encapsulant formed around the plurality of integrated circuit dies and the underfill, wherein the thermal interface material covers the plurality of integrated circuit dies and the encapsulant in a normal direction of the substrate.Join the waitlist — get patent alerts
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