Micro-emitter display having a color-segmented backplane

Abstract

A color display that can deactivate colors based on one or more criteria is disclosed. Reducing the number of color channels used to display an image may help conserve power, which may help extend the operating life of a battery-operated device. The display includes a backplane that is segmented by color to enable the deactivation. The segmentation may also reduce electrical loading on the electrical lines used to address the pixels in the backplane.

1 . A display comprising:
 a pixel array configured to radiate light in color channels, the pixel array including:
 pixels organized into clusters, the clusters arranged in rows and columns and each pixel in a cluster is configured to radiate one of the color channels; 
 a plurality of bit-lines corresponding each column, wherein each bit-line corresponds to at least one of the color channels of a respective column; and 
 a plurality of word-lines corresponding to each row, wherein each word-line corresponds to at least one of the color channels of a respective row; and 
   a display controller configured to:
 determine which color channels are active color channels; and 
 address pixels corresponding to the active color channels to display an image received at the display. 
   
     
     
         2 . The display according to  claim 1 , wherein the display controller is further configured to:
 determine which of the color channels are inactive color channels; and   not address the pixels corresponding to the inactive color channels to reduce a power consumed by the display while displaying the image.   
     
     
         3 . The display according to  claim 1 , wherein the active color channels are based on the image received at the display. 
     
     
         4 . The display according to  claim 1 , wherein the display controller is further configured to:
 detect that the image is part of a video stream; and   determine that all of the color channels are the active color channels based on the detection.   
     
     
         5 . The display according to  claim 1 , wherein the active color channels are based on a power mode of the display. 
     
     
         6 . The display according to  claim 5 , wherein the active color channels include:
 all of the color channels when the power mode is a high-power mode; and   one color channel when the power mode is a low-power mode, wherein the high-power mode and the low-power mode are based on a battery level of a device into which the display is integrated.   
     
     
         7 . The display according to  claim 1 , wherein the active color channels are based on a light condition of the display. 
     
     
         8 . The display according to  claim 7 , wherein the active color channels include:
 all of the color channels when the light condition is above a bright light threshold; and   one of the color channels when the light condition is below the bright light threshold.   
     
     
         9 . The display according to  claim 1 , wherein the active color channels are based on a user input. 
     
     
         10 . The display according to  claim 1 , further comprising:
 a bit plane sequencer configured to output a sequence of bit planes for each color channel based on the image received at the display.   
     
     
         11 . The display according to  claim 1 , wherein the plurality of word-lines for each row include:
 a word-line corresponding to at least one color channel, the word-line coupled to the pixels in each cluster of a row that correspond to the at least one color channel.   
     
     
         12 . The display according to  claim 1 , wherein the plurality of bit-lines for each column include:
 a bit-line corresponding to at least one color channel of the display, the bit-line coupled to the pixels in each cluster of a column that correspond to the at least one color channel.   
     
     
         13 . The display according to  claim 12 , further comprising:
 a plurality of bit-line drivers coupled to groups of bit-lines, each group of bit-lines corresponding to a color channel of the display, wherein only bit-line drivers of the active color channels are addressed to reduce a power consumed by the display.   
     
     
         14 . The display according to  claim 1 , wherein the pixels each include:
 a micro-LED; and   a static random access memory (SRAM) cell, wherein an ON/OFF state of the micro-LED is based on a state of the SRAM cell.   
     
     
         15 . A method comprising:
 receiving an image at a display including clusters of pixels configured to radiate light in color channels;   designating pixels in each cluster as active-color-channel pixels or inactive-color-channel pixels;   addressing the clusters of pixels by word-lines corresponding to the active-color-channel pixels to couple the active-color-channel pixels to respective bit-lines; and   writing image data to the active-color-channel pixels via the respective bit-lines to display the image.   
     
     
         16 . The method according to  claim 15 , wherein designating the pixels in each cluster as the active-color-channel pixels or the inactive-color-channel pixels is based on the image. 
     
     
         17 . The method according to  claim 15 , wherein designating the pixels as the active-color-channel pixels or the inactive-color-channel pixels includes:
 selecting a power mode of the display; and   designating the active-color-channel pixels or the inactive-color-channel pixels based on the power mode.   
     
     
         18 . The method according to  claim 17 , further comprising:
 measuring a light condition of an environment of the display; and   selecting the power mode of the display based on the light condition.   
     
     
         19 . A static random access memory (SRAM) display, the SRAM display comprising:
 clusters of pixels arranged in rows and columns, each cluster including at pixels for color channels of the SRAM display, each pixel including a micro-LED configured to radiate light in one of the color channels of the SRAM display according to a state of an SRAM of each pixel; and   a display controller configured to:
 deactivate the pixels of one or more of the color channels to conserve power; and 
 render an image using the pixels of the color channels that have not been deactivated. 
   
     
     
         20 . The SRAM display according to  claim 19 , further comprising:
 a bit plane sequencer configured to output a sequence of bit planes for each color channel based of the image received at the SRAM display;   a plurality of word-lines for each row of the SRAM display, each word-line of a row corresponding to one or more of the color channels of each cluster of the row; and   a plurality of bit-line drivers, each bit-line driver corresponding to a color channel of the SRAM display.