US2024426775A1PendingUtilityA1

Methods and apparatus for measuring analytes using large scale fet arrays

Assignee: LIFE TECHNOLOGIES CORPPriority: Dec 14, 2006Filed: Jun 3, 2024Published: Dec 26, 2024
Est. expiryDec 14, 2026(~0.4 yrs left)· nominal 20-yr term from priority
H10D 30/6891H10D 84/83H10D 30/60G01N 33/5438G01N 27/4145G01N 33/54373C12Q 1/6818C12Q 1/6874Y10T436/22G01N 33/543G01N 27/414G01N 27/4148H01L 2924/1433H01L 2924/14H01L 2924/01073H01L 2924/01015H01L 2924/01013H01L 2924/01006H01L 29/42324H01L 29/78H01L 27/088
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Claims

Abstract

Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.

Claims

exact text as granted — not AI-modified
What is claimed: 
     
         1 . A semiconductor device, comprising:
 an array of at least 10{circumflex over ( )}6 CMOS sensors, wherein the array of CMOS sensor comprises:
 a plurality of field effect transistors (FETs) including one chemically-sensitive field effect transistor (chemFET) for each CMOS sensor, wherein the plurality of FETs in each CMOS sensor are of a same channel type; and 
 a body connection of each chemFET sensor in the array of CMOS sensors tied to a common body bias voltage; 
   row select circuitry configured to enable a selected row of CMOS sensors to a controllable current source in response to a row select signal; and   column readout circuitry configured to successively acquire output signals from each CMOS sensor in each respective column of the selected row of CMOS sensors.

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