Display panel having isolation strucure and display device comprising the same

Abstract

A display panel and a display device. The display panel includes a first film and an isolation structure. The first film is disposed at a side of a substrate and located in an isolation area, and has a first surface facing the substrate and a second surface facing away from the substrate. The isolation structure is located on the second surface in the isolation area and surrounds an opening area. The isolation structure has a bottom surface facing the second surface and a top surface facing away from the second surface. A distance between each point, at the second surface between the isolation structure and the active area, and a plane, within which the top surface is located, is equal to a height of the isolation structure.

1 . A display panel, wherein:
 a non-active area of the display panel surrounds an active area of the display panel, the active area surrounds an opening area of the display panel, and an isolation area of the display panel is located between the active area and the opening area;   the display panel comprises a substrate and a plurality of drive circuits, wherein the plurality of drive circuits is arranged in an array at a side of the substrate and is located in the active area;   each drive circuit of the plurality of drive circuits comprises a low-temperature polysilicon thin film transistor (TFT) and an oxide TFT, and the low-temperature polysilicon TFT and the oxide TFT are disposed in different layers;   the display panel further comprises a plurality of data lines connected to the plurality of drive circuits, the non-active area comprises a first fan-out area, and the active area comprises a second fan-out area;   the display panel further comprises a plurality of first fan-out lines and a plurality of second fan-out lines, wherein the plurality of first fan-out lines is disposed in the first fan-out area, and the plurality of second fan-out lines is disposed in the second fan-out area;   for each second fan-out line of the plurality of the second fan-out lines, a first terminal of the second fan-out line is connected to a corresponding date line of the plurality of data lines, and a second terminal of the second fan-out line is connected to a corresponding first fan-outline of the plurality of first fan-out lines;   the display panel further comprises a first film and an isolation structure;   the first film is disposed at the side of the substrate and is located in the isolation area, a first surface of the first film faces the substrate, and a second surface of the first film faces away from the substrate;   the isolation structure is disposed in the isolation area at the second surface of the first film and surrounds the opening area, a bottom surface of the isolation structure faces the second surface, and a top surface of the isolation structure faces away from the second surface; and   a distance between each position, which is on the second surface between the isolation structure and the active area, and a reference plane, within which the top surface is located, is equal to a height of the isolation structure.   
     
     
         2 . The display panel according to  claim 1 , wherein:
 a distance between each position, which is on the second surface between the isolation structure and the opening area, and the reference plane is equal to the height of the isolation structure.   
     
     
         3 . The display panel according to  claim 1 , wherein:
 the isolation structure comprises a plurality of isolation columns arranged at intervals, and   a distance between each position, which is on the second surface between adjacent isolation columns of the plurality of isolation columns, and the reference plane is equal to the height of the isolation structure.   
     
     
         4 . The display panel according to  claim 1 , wherein:
 the low-temperature polysilicon TFT comprises a low-temperature polysilicon active layer, a first gate, a first source, and a first drain, and the first source and the first drain are connected to the low-temperature polysilicon active layer;   the oxide TFT comprises an oxide active layer, a second gate, a second source, and a second drain, and the second source and the second drain are connected to the oxide active layer;   the display panel further comprises a first insulating layer, a second insulating layer, a third insulating layer, and an interlayer dielectric layer;   the first insulating layer is disposed on the low-temperature polysilicon active layer, the first gate is disposed on the first insulating layer, and the second insulating layer is disposed on the first insulating layer and the first gate; and   the oxide active layer is disposed on the second insulating layer, the third insulating layer is disposed on the second insulating layer and the oxide active layer, the second gate is disposed on the third insulating layer, and the interlayer dielectric layer is disposed on the third insulating layer and the second gate.   
     
     
         5 . The display panel according to  claim 4 , wherein:
 the first film comprises a first sub-layer, a second sub-layer, a third sub-layer, and a fourth sub-layer;   the first sub-layer and the first insulating layer are disposed in a first layer and are identical in material;   the second sub-layer and the second insulating layer are disposed in a second layer and are identical in material;   the third sub-layer and the third insulating layer are disposed in a third layer and are identical in material; and   the fourth sub-layer and the interlayer dielectric layer are disposed in a fourth layer and are identical in material.   
     
     
         6 . The display panel according to  claim 5 , wherein:
 the isolation structure is disposed on the fourth sub-layer;   a stress release groove is arranged in at least one of the first sub-layer, the second sub-layer, or the third sub-layer; and   the stress release groove is filled with an organic filling material.   
     
     
         7 . The display panel according to  claim 5 , wherein:
 the first source, the first drain, the second source, the second drain, and at least a part of the isolation structure are disposed in a same layer and are identical in material.   
     
     
         8 . The display panel according to  claim 5 , wherein:
 the plurality of second fan-out lines are disposed at a side of the plurality of drive circuits away from the substrate;   the display panel further comprises a fourth insulating layer, the fourth insulating layer is disposed in the second fan-out area and between the second fan-out lines and the drive circuits;   the display panel further comprises a planarization layer disposed on the interlayer dielectric layer, the first source, the first drain, the second source, the second drain, the fourth insulating layer, and the plurality of second fan-out lines.   
     
     
         9 . The display panel according to  claim 8 , wherein:
 the first film further comprises a fifth sub-layer, and   the fifth sub-layer and the fourth insulating layer are disposed in a fifth layer and are identical in material.   
     
     
         10 . The display panel according to  claim 9 , wherein:
 the isolation structure is disposed on the fifth sub-layer;   a stress release groove is arranged in at least one of the first sub-layer, the second sub-layer, the third sub-layer, or the fourth sub-layer; and   the stress release groove is filled with an organic filling material.   
     
     
         11 . The display panel according to  claim 9 , further comprising:
 a metal light-shielding layer, disposed between the plurality of drive circuits and the substrate, wherein:   an orthographic projection of the low-temperature polysilicon active layer on the substrate is located within an orthographic projection of the metal light-shielding layer on the substrate; and   an orthographic projection of the oxide active layer on the substrate is located within the orthographic projection of the metal light-shielding layer on the substrate.   
     
     
         12 . The display panel according to  claim 11 , further comprising:
 a fifth insulating layer covering the metal light-shielding layer, wherein and the low-temperature polysilicon active layer is disposed on the fifth insulating layer.   
     
     
         13 . The display panel according to  claim 12 , wherein:
 the first film further comprises a sixth sub-layer; and   the sixth sub-layer and the fifth insulating layer are disposed in a sixth layer and are identical in material.   
     
     
         14 . The display panel according to  claim 13 , wherein:
 the isolation structure is disposed on the sixth sub-layer;   a stress release groove is arranged in at least one of the first sub-layer, the second sub-layer, the third sub-layer, the fourth sub-layer, or the fifth sub-layer; and   the stress release groove is filled with an organic filling material.   
     
     
         15 . The display panel according to  claim 1 , further comprising a light-emitting layer, a packaging layer, and a blocking wall, wherein:
 the light-emitting layer is disposed in the active area and comprises a plurality of light-emitting elements;   the packaging layer is disposed at a side of the light-emitting layer away from the substrate, and is disposed in the active area and the isolation area;   the packaging layer comprises a first inorganic packaging layer, an organic packaging layer, and a second inorganic packaging layer; and   the blocking wall is disposed in the isolation area, and is configured to block the organic packaging layer.   
     
     
         16 . A display device, comprising a display panel, wherein:
 a non-active area of the display panel surrounds an active area of the display panel, the active area surrounds an opening area of the display panel, and an isolation area of the display panel is located between the active area and the opening area;   the display panel comprises a substrate and a plurality of drive circuits, wherein the plurality of drive circuits is arranged in an array at a side of the substrate and is located in the active area;   each drive circuit of the plurality of drive circuits comprises a low-temperature polysilicon thin film transistor (TFT) and an oxide TFT, and the low-temperature polysilicon TFT and the oxide TFT are disposed in different layers;   the display panel further comprises a plurality of data lines connected to the plurality of drive circuits, the non-active area comprises a first fan-out area, and the active area comprises a second fan-out area;   the display panel further comprises a plurality of first fan-out lines and a plurality of second fan-out lines, wherein the plurality of first fan-out lines is disposed in the first fan-out area, and the plurality of second fan-out lines is disposed in the second fan-out area;   for each second fan-out line of the plurality of the second fan-out lines, a first terminal of the second fan-out line is connected to a corresponding date line of the plurality of data lines, and a second terminal of the second fan-out line is connected to a corresponding first fan-outline of the plurality of first fan-out lines;   the display panel further comprises a first film and an isolation structure;   the first film is disposed at the side of the substrate and is located in the isolation area, a first surface of the first film faces the substrate, and a second surface of the first film faces away from the substrate;   the isolation structure is disposed in the isolation area at the second surface of the first film and surrounds the opening area, a bottom surface of the isolation structure faces the second surface, and a top surface of the isolation structure faces away from the second surface; and   a distance between each position, which is on the second surface between the isolation structure and the active area, and a reference plane, within which the top surface is located, is equal to a height of the isolation structure.