Chip stacking with bond pad above a bondline

Abstract

A semiconductor device may include a first chip that includes a first wafer and a first dielectric layer disposed thereon. The semiconductor device may include a second chip that includes a second wafer and a second dielectric layer disposed thereon, the second chip having a backside surface and a frontside surface opposed to the backside surface, the second chip being bonded to the first chip at the frontside surface to define a bond line between the first dielectric layer and the second dielectric layer. An opening through the backside surface of the second chip may extend into the second dielectric layer, and a bond pad may be disposed within the second dielectric layer between the second wafer and the bond line.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a first chip that includes a first wafer and a first dielectric layer disposed thereon;   a second chip that includes a second wafer and a second dielectric layer disposed thereon, the second chip having a backside surface and a frontside surface opposed to the backside surface, the second chip being bonded to the first chip at the frontside surface to define a bond line between the first dielectric layer and the second dielectric layer;   an opening through the backside surface of the second chip that extends into the second dielectric layer; and   a bond pad disposed within the second dielectric layer between the second wafer and the bond line, and extending beyond the opening in a direction parallel to the bond line.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising:
 an external connection to the semiconductor device that is electrically connected to the bond pad through the opening.   
     
     
         3 . The semiconductor device of  claim 1 , wherein an entirety of the bond pad is positioned below the second wafer in a direction of the first chip. 
     
     
         4 . The semiconductor device of  claim 1 , further comprising:
 a moisture-resistant dielectric within the second dielectric layer and coplanar with the bond pad, and blocking a moisture path between the opening and the bond pad.   
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a moisture-resistant seal ring at least partially surrounding the opening.   
     
     
         6 . The semiconductor device of  claim 5 , wherein the bond pad extends beyond the moisture-resistant seal ring in the direction parallel to the bond line. 
     
     
         7 . The semiconductor device of  claim 1 , further comprising:
 a copper-copper hybrid bond bonding the second chip to the first chip and defining the bond line.   
     
     
         8 . The semiconductor device of  claim 1 , wherein a thickness of the bond pad is at least 1 micron. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the second chip includes an optical sensor chip and the first chip includes a circuit chip configured to operate and/or receive an output of the optical sensor chip. 
     
     
         10 . The semiconductor device of  claim 1 , further comprising:
 a color filter array (CFA) and microlens array disposed on the backside surface of the second chip.   
     
     
         11 . A semiconductor device, comprising:
 a first chip that includes a first wafer and a first dielectric layer disposed thereon;   a second chip that includes a second wafer and a second dielectric layer disposed thereon, with a bond pad disposed within the second dielectric layer, the second chip having a backside surface and a frontside surface opposed to the backside surface and being bonded to the first chip at the frontside surface to define a bond line between the first dielectric layer and the second dielectric layer; and   an opening through the backside surface of the second chip and through the second wafer, the opening extending into the second dielectric layer to expose only a portion of an upper surface of the bond pad for electrical connection thereto.   
     
     
         12 . The semiconductor device of  claim 11 , wherein an entirety of the bond pad is positioned below the second wafer in a direction of the first chip. 
     
     
         13 . The semiconductor device of  claim 11 , further comprising:
 a moisture-resistant dielectric within the second dielectric layer and coplanar with the bond pad, and blocking a moisture path between the opening and the bond pad.   
     
     
         14 . The semiconductor device of  claim 11 , further comprising:
 a moisture-resistant seal ring at least partially surrounding the opening.   
     
     
         15 . The semiconductor device of  claim 14 , wherein the bond pad extends beyond the moisture-resistant seal ring in a direction parallel to the bond line. 
     
     
         16 . A method of making a semiconductor device, comprising:
 forming a first chip that includes a first wafer and a first dielectric layer disposed thereon;   forming a second dielectric layer on a second wafer of a second chip;   forming a bond pad within the second dielectric layer;   bonding a frontside surface of the second chip to the first chip to define a bond line between the first dielectric layer and the second dielectric layer; and   etching an opening through a backside surface of the second chip that extends through the second wafer and into the second dielectric layer to the bond pad, for electrical connection thereto.   
     
     
         17 . The method of  claim 16 , further comprising:
 etching the opening to expose only a portion of an upper surface of the bond pad.   
     
     
         18 . The method of  claim 16 , further comprising:
 forming a moisture-resistant dielectric within the second dielectric layer and coplanar with the bond pad that is positioned to block a moisture path between the opening and the bond pad.   
     
     
         19 . The method of  claim 16 , further comprising:
 forming a moisture-resistant seal ring at least partially surrounding the opening.   
     
     
         20 . The method of  claim 19 , wherein the bond pad extends beyond the moisture-resistant seal ring in a direction parallel to the bond line.