Image sensor device and operation method thereof

Abstract

Disclosed is an image sensor device which includes a pixel that outputs a first pixel signal to a first column line during a first time period and outputs a second pixel signal to the first column line during a second time period, and a clamp circuit that outputs a first clamp signal to the first column line during the first time period. During the first time period, a voltage of the first column line is determined based on the first pixel signal and the first clamp signal. The pixel operates based on a first power supply voltage, and the clamp circuit operates based on a second power supply voltage lower than the first power supply voltage.

What is claimed is: 
     
         1 . An image sensor device comprising:
 a pixel configured to output a first pixel signal to a first column line during a first time period and to output a second pixel signal to the first column line during a second time period; and   a clamp circuit configured to output a first clamp signal to the first column line during the first time period,   wherein, during the first time period, a voltage of the first column line is determined based on the first pixel signal and the first clamp signal, and   wherein the pixel is configured to operate based on a first power supply voltage, and the clamp circuit is configured to operate based on a second power supply voltage that is lower than the first power supply voltage.   
     
     
         2 . The image sensor device of  claim 1 , wherein the clamp circuit includes a clamp transistor configured to operate in response to a clamp control signal, and
 wherein, during the first time period, a voltage of the clamp control signal is higher than the second power supply voltage.   
     
     
         3 . The image sensor device of  claim 2 , wherein the clamp circuit further includes a clamp select transistor configured to operate in response to a clamp selection signal, and
 wherein the clamp transistor is connected between the second power supply voltage and a first node, and the clamp select transistor is connected between the first node and the first column line.   
     
     
         4 . The image sensor device of  claim 3 , further comprising:
 a bias circuit,   wherein the bias circuit includes:   a bias amplifier including a first input terminal, a second input terminal, and an output terminal, wherein the bias amplifier is configured to output the clamp control signal through the output terminal based on a bias signal received through the first input terminal and a voltage of the second input terminal;   a bias transistor connected between the second power supply voltage and the second input terminal, wherein the bias transistor is configured to operate in response to the clamp control signal; and   a bias current source connected between the second input terminal and a ground node.   
     
     
         5 . The image sensor device of  claim 4 , wherein the bias amplifier is configured to operate based on the first power supply voltage. 
     
     
         6 . The image sensor device of  claim 5 , wherein the clamp circuit further includes:
 a voltage regulator configured to generate the second power supply voltage based on the first power supply voltage.   
     
     
         7 . The image sensor device of  claim 3 , wherein, during the first time period, the clamp transistor is configured to operate in a linear region. 
     
     
         8 . The image sensor device of  claim 3 , wherein, in response to the clamp selection signal, the clamp select transistor is turned on in the first time period and is turned off in the second time period. 
     
     
         9 . The image sensor device of  claim 4 , wherein the bias amplifier is configured to operate based on a third power supply voltage,
 wherein the third power supply voltage is higher than the first power supply voltage, and   wherein the voltage of the clamp control signal is higher than the first power supply voltage.   
     
     
         10 . An image sensor device comprising:
 a control circuit configured to output a first control signal and a clamp selection signal;   a row decoder configured to output a reset signal, a transfer signal, and a selection signal based on the first control signal;   a pixel configured to operate in response to the reset signal, the transfer signal, and the selection signal such that a first pixel signal is output to a first column line during a first time period and a second pixel signal is output to the first column line during a second time period; and   a clamp circuit configured to output a first clamp signal to the first column line during the first time period,   wherein the pixel includes:   a photodiode configured to integrate charges in response to a light signal;   a transfer transistor connected between the photodiode and a floating diffusion node, and configured to operate in response to the transfer signal;   a reset transistor connected between a first power supply voltage and the floating diffusion node, and configured to operate in response to the reset signal;   a drive transistor connected between the first power supply voltage and a 0-th node, and configured to operate in response to a voltage of the floating diffusion node; and   a select transistor connected between the 0-th node and the first column line, and configured to operate in response to the selection signal,   wherein the clamp circuit includes:   a clamp transistor connected between a second power supply voltage and a first node, and configured to operate in response to a clamp control signal; and   a clamp select transistor connected between the first node and the first column line, and configured to operate in response to the clamp selection signal, and   wherein the second power supply voltage is lower than the first power supply voltage.   
     
     
         11 . The image sensor device of  claim 10 , wherein, during the first time period, a voltage of the clamp control signal is higher than the second power supply voltage. 
     
     
         12 . The image sensor device of  claim 11 , wherein the control circuit is further configured to output a bias signal, and
 wherein the image sensor device further comprises:   a bias circuit,   wherein the bias circuit includes:   a bias amplifier including a first input terminal, a second input terminal, and an output terminal, wherein the bias amplifier is configured to output the clamp control signal through the output terminal based on the bias signal received through the first input terminal and a voltage of the second input terminal;   a bias transistor connected between the second power supply voltage and the second input terminal, wherein the bias transistor is configured to operate in response to the clamp control signal; and   a bias current source connected between the second input terminal and a ground node.   
     
     
         13 . The image sensor device of  claim 12 , wherein the bias amplifier is configured to operate based on the first power supply voltage. 
     
     
         14 . The image sensor device of  claim 13 , further comprising:
 a voltage regulator configured to generate the second power supply voltage based on the first power supply voltage.   
     
     
         15 . The image sensor device of  claim 10 , wherein, during the first time period, the clamp transistor is configured to operate in a linear region. 
     
     
         16 . An image sensor device comprising:
 a pixel configured to output a first pixel signal to a first column line during a first time period and to output a second pixel signal to the first column line during a second time period; and   a clamp circuit configured to output a first clamp signal to the first column line during the first time period,   wherein, during the first time period, a voltage of the first column line is determined based on the first pixel signal and the first clamp signal, and   wherein the pixel and the clamp circuit are configured to operate based on a first power supply voltage, a voltage of the first clamp signal is determined based on a voltage of a clamp control signal, and the voltage of the clamp control signal is higher than the first power supply voltage.   
     
     
         17 . The image sensor device of  claim 16 , wherein the clamp circuit includes:
 a clamp transistor configured to operate in response to the clamp control signal; and   a clamp select transistor configured to operate in response to a clamp selection signal, and   wherein the clamp transistor is connected between the first power supply voltage and a first node, and the clamp select transistor is connected between the first node and the first column line.   
     
     
         18 . The image sensor device of  claim 17 , further comprising a bias circuit, wherein the bias circuit includes:
 a bias amplifier including a first input terminal, a second input terminal, and an output terminal, wherein the bias circuit is configured to output the clamp control signal through the output terminal based on a bias signal received through the first input terminal and a voltage of the second input terminal;   a bias transistor connected between a second power supply voltage and the second input terminal, wherein the bias transistor is configured to operate in response to the clamp control signal; and   a bias current source connected between the second input terminal and a ground node.   
     
     
         19 . The image sensor device of  claim 18 , wherein the bias amplifier operates based on the second power supply voltage, and the second power supply voltage is higher than the first power supply voltage. 
     
     
         20 . The image sensor device of  claim 17 , wherein, during the first time period, the clamp transistor is configured to operate in a linear region.