Power module thermal management

Abstract

Aspects of the disclosure include a power module having enhanced thermal management. An exemplary power module can include a direct bond copper (DBC) substrate having a top copper layer, a bottom copper layer, and a dielectric layer between the top copper layer and the bottom copper layer. The power module includes a thin-film thermoelectric cooler (TFTEC) having a thermoelectric film positioned between a top insulator and a bottom insulator. One or more dies are positioned over the DBC substrate and the TFTEC and a controller is configured to adjust a thermoelectric device current of the TFTEC responsive to a temperature of the one or more dies.

What is claimed is: 
     
         1 . A power module comprising:
 a direct bond copper (DBC) substrate comprising a top copper layer, a bottom copper layer, and a dielectric layer between the top copper layer and the bottom copper layer;   a thin-film thermoelectric cooler (TFTEC) comprising a thermoelectric film positioned between a top insulator and a bottom insulator;   one or more dies positioned over the DBC substrate and the TFTEC; and   a controller configured to adjust a thermoelectric device current of the TFTEC responsive to a temperature of the one or more dies.   
     
     
         2 . The power module of  claim 1 , further comprising a cold plate coupled to one of the DBC substrate and the TFTEC. 
     
     
         3 . The power module of  claim 1 , wherein the one or more dies each comprise one of an Insulated Gate Bipolar Transistor (IGBT), an anti-parallel diode, a Silicon Carbide (SIC) MOSFET die, a Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) die, or a vertical GaN Junction Field Effect Transistor (JFET) die. 
     
     
         4 . The power module of  claim 1 , wherein the dielectric layer comprises at least one of a ceramic material, silicon nitride (Si 3 N 4 ), aluminum-oxide (Al 2 O 3 ), and aluminum-nitride (AlN). 
     
     
         5 . The power module of  claim 1 , wherein the thermoelectric film comprises a nano-composite thermoelectric film comprising Bi 2 Te 3 . 
     
     
         6 . The power module of  claim 1 , wherein a bottom surface of the one or more dies is secured to the top copper layer of the DBC substrate. 
     
     
         7 . The power module of  claim 1 , wherein a bottom surface of the one or more dies is secured to the top insulator of the TFTEC. 
     
     
         8 . A vehicle comprising:
 an electric motor; and   a power module coupled to the electric motor, the power module comprising:
 a direct bond copper (DBC) substrate comprising a top copper layer, a bottom copper layer, and a dielectric layer between the top copper layer and the bottom copper layer; 
 a thin-film thermoelectric cooler (TFTEC) comprising a thermoelectric film positioned between a top insulator and a bottom insulator; 
 one or more dies positioned over the DBC substrate and the TFTEC; and 
 a controller configured to adjust a thermoelectric device current of the TFTEC responsive to a temperature of the one or more dies. 
   
     
     
         9 . The vehicle of  claim 8 , further comprising a cold plate coupled to one of the DBC substrate and the TFTEC. 
     
     
         10 . The vehicle of  claim 8 , wherein the one or more dies each comprise one of an Insulated Gate Bipolar Transistor (IGBT), an anti-parallel diode, a Silicon Carbide (SiC) MOSFET die, a Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) die, or a vertical GaN Junction Field Effect Transistor (JFET) die. 
     
     
         11 . The vehicle of  claim 8 , wherein the dielectric layer comprises at least one of a ceramic material, silicon nitride (Si 3 N 4 ), aluminum-oxide (Al 2 O 3 ), and aluminum-nitride (AlN). 
     
     
         12 . The vehicle of  claim 8 , wherein the thermoelectric film comprises a nano-composite thermoelectric film comprising Bi 2 Te 3 . 
     
     
         13 . The vehicle of  claim 8 , wherein a bottom surface of the one or more dies is secured to the top copper layer of the DBC substrate. 
     
     
         14 . The vehicle of  claim 8 , wherein a bottom surface of the one or more dies is secured to the top insulator of the TFTEC. 
     
     
         15 . A method comprising:
 forming a direct bond copper (DBC) substrate comprising a top copper layer, a bottom copper layer, and a dielectric layer between the top copper layer and the bottom copper layer;   forming a thin-film thermoelectric cooler (TFTEC) comprising a thermoelectric film positioned between a top insulator and a bottom insulator;   positioning one or more dies over the DBC substrate and the TFTEC; and   adjusting, using a controller electrically coupled to the one or more dies and the TFTEC, a thermoelectric device current of the TFTEC responsive to a temperature of the one or more dies.   
     
     
         16 . The method of  claim 15 , wherein the one or more dies each comprise one of an Insulated Gate Bipolar Transistor (IGBT), an anti-parallel diode, a Silicon Carbide (SIC) MOSFET die, a Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) die, or a vertical GaN Junction Field Effect Transistor (JFET) die. 
     
     
         17 . The method of  claim 15 , wherein the dielectric layer comprises at least one of a ceramic material, silicon nitride (Si 3 N 4 ), aluminum-oxide (Al 2 O 3 ), and aluminum-nitride (AlN). 
     
     
         18 . The method of  claim 15 , wherein the thermoelectric film comprises a nano-composite thermoelectric film comprising Bi 2 Te 3 . 
     
     
         19 . The method of  claim 15 , wherein a bottom surface of the one or more dies is secured to the top copper layer of the DBC substrate. 
     
     
         20 . The method of  claim 15 , wherein a bottom surface of the one or more dies is secured to the top insulator of the TFTEC.