Semiconductor device and method of manufacturing the semiconductor device

Abstract

A semiconductor device including: a gate structure in which conductive layers and insulating layers are alternately stacked; contact plug extending in a stacking direction of the insulating layers through the gate structure; first spacer layers each located between the conductive layer and the contact plug; and second spacer layers each located between the contact plug and the first spacer layer.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a gate structure including insulating layers and conductive layers that are alternately stacked;   a contact plug extending in a stacking direction of the insulating layers through the gate structure;   first spacer layers each located between the conductive layers and the contact plug; and   second spacer layers each located between the contact plug and the first spacer layers.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the second spacer layers each include a void. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the first spacer layers are void-free oxide layers. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the first spacer layers or the second spacer layers each include silicon oxide. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the contact plug includes a pillar and a first protrusion protruding from the pillar. 
     
     
         6 . The semiconductor device of  claim 5 , wherein the gate structure includes a step structure for exposing at least one of the conductive layers, and the pillar passes through an uppermost conductive layer exposed by the step structure. 
     
     
         7 . The semiconductor device of  claim 6 , wherein the first protrusion is connected to a top surface of the uppermost conductive layer exposed by the step structure. 
     
     
         8 . The semiconductor device of  claim 5 , further comprising:
 a second protrusion located in the second spacer layers and protruding from the pillar.   
     
     
         9 . The semiconductor device of  claim 1 , further comprising:
 barrier layers located between the conductive layers and the first spacer layers, respectively.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the barrier layers each include oxide or nitride. 
     
     
         11 . The semiconductor device of  claim 1 , wherein the first spacer layers located at different levels have different thicknesses. 
     
     
         12 . The semiconductor device of  claim 1 , wherein the second spacer layers located at different levels have different thicknesses. 
     
     
         13 . The semiconductor device of  claim 1 , further comprising:
 sacrificial layers located between the first spacer layers and the conductive layers, respectively.   
     
     
         14 . The semiconductor device of  claim 13 , wherein the sacrificial layers each include amorphous silicon. 
     
     
         15 . A method of manufacturing a semiconductor device, the method comprising:
 forming a stack including first material layers and second material layers that are alternately stacked;   forming a first opening extending in a stacking direction of the first material layers through the stack;   forming second openings connected to the first opening by etching the second material layers;   forming first spacer layers in the second openings, respectively;   forming second spacer layers in the second openings, respectively; and   forming a contact plug in the first opening.   
     
     
         16 . The method of  claim 15 , wherein the forming of the first spacer layers comprises:
 forming sacrificial layers in the second openings, respectively;   forming the first spacer layers by oxidizing the sacrificial layers.   
     
     
         17 . The method of  claim 16 , wherein the first spacer layers are formed as the sacrificial layers are oxidized and expanded in volume. 
     
     
         18 . The method of  claim 16 , wherein the forming of the sacrificial layers comprises:
 forming a sacrificial material in the first opening and the second openings; and   etching the sacrificial material so that a portion of the sacrificial material formed in the first opening is removed.   
     
     
         19 . The method of  claim 16 , wherein the sacrificial layers each include amorphous silicon. 
     
     
         20 . The method of  claim 15 , wherein the first spacer layers are void-free oxide layers. 
     
     
         21 . The method of  claim 15 , wherein the forming of the second spacer layers comprises:
 forming a first oxide layer in the second openings;   partially etching the first oxide layer; and   forming a second oxide layer in the second openings.   
     
     
         22 . The method of  claim 21 , wherein, in the forming of the second oxide layer, the second oxide layer including a void is formed by depositing the second oxide layer along an etched surface of the first oxide layer. 
     
     
         23 . The method of  claim 15 , wherein the first spacer layers or the second spacer layers each include silicon oxide. 
     
     
         24 . The method of  claim 15 , further comprising:
 forming a step structure for exposing at least one of the second material layers; and   forming a buffer layer on the step structure.   
     
     
         25 . The method of  claim 24 , wherein the forming of the contact plug comprises:
 forming a third opening by removing the buffer layer through the first opening; and   forming the contact plug including a pillar located in the first opening and a protrusion located in the third opening.