Display panel and electronic apparatus
Abstract
A display panel includes: a first sub-pixel circuit at a first display area, and including: a first transistor; a storage capacitor; and a second transistor; an organic insulating layer on the first transistor and the second transistor; a first light-emitting diode at the first display area, and electrically connected to the first sub-pixel circuit; a second light-emitting diode at a second display area including a transmission area; a bank layer having a first opening, and a second opening; at least one line overlapping with a first electrode of the first light-emitting diode and the first opening of the bank layer; and a conductive pattern layer at the second display area and overlapping with a first electrode of the second light-emitting diode and the second opening of the bank layer. The conductive pattern layer is located at a same layer as that of the at least one line.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A display panel comprising:
a first sub-pixel circuit at a first display area, and comprising:
a first transistor comprising a first semiconductor layer and a first gate electrode;
a storage capacitor; and
a second transistor comprising a second semiconductor layer and a second gate electrode;
an organic insulating layer on the first transistor and the second transistor; a first light-emitting diode at the first display area, and electrically connected to the first sub-pixel circuit, the first light-emitting diode comprising a first electrode on the organic insulating layer; a second light-emitting diode at a second display area at least partially surrounded by the first display area, and comprising a first electrode on the organic insulating layer, the second display area comprising a transmission area; a bank layer having a first opening overlapping with the first electrode of the first light-emitting diode, and a second opening overlapping with the first electrode of the second light-emitting diode; at least one line overlapping with the first electrode of the first light-emitting diode and the first opening of the bank layer; and a conductive pattern layer at the second display area and overlapping with the first electrode of the second light-emitting diode and the second opening of the bank layer, wherein the at least one line comprises at least one of a driving power line, a data connection line, or a data line, and wherein the conductive pattern layer is located at a same layer as that of the at least one line.
2 . The display panel of claim 1 , further comprising a lower organic insulating layer under the organic insulating layer,
wherein the conductive pattern layer and the at least one line are located between the lower organic insulating layer and the organic insulating layer.
3 . The display panel of claim 1 , further comprising:
a second sub-pixel circuit at a third display area between the first display area and the second display area, and electrically connected to the second light-emitting diode; and a conductive bus line extending towards the second display area at the third display area to electrically connect the second sub-pixel circuit to the second light-emitting diode.
4 . The display panel of claim 3 , wherein the conductive bus line is located at a same layer as that of any one of the first gate electrode, an electrode of the storage capacitor, or the second gate electrode.
5 . The display panel of claim 1 , wherein the conductive pattern layer comprises a plurality of conductive lines overlapping with the second opening of the bank layer, and
wherein an extension direction of each of the plurality of conductive lines is the same as an extension direction of the at least one line overlapping with the first opening of the bank layer.
6 . The display panel of claim 5 , wherein the at least one line comprises a plurality of data lines, and a data connection line, and
wherein a first distance between two adjacent conductive lines selected from among the plurality of conductive lines is the same as a second distance between two adjacent lines selected from among the plurality of data lines and the data connection line.
7 . The display panel of claim 5 , wherein the plurality of conductive lines are integrally coupled to a connection conductive line crossing the plurality of conductive lines.
8 . The display panel of claim 1 , wherein the at least one line comprises a connection portion of a plurality of driving power lines that are physically connected to each other, and
wherein a shape or an area in which the second opening of the bank layer overlaps with the conductive pattern layer is the same as a shape or an area in which the first opening of the bank layer overlaps with the connection portion of the plurality of driving power lines.
9 . The display panel of claim 1 , wherein, in a plan view, a shape in which the second opening of the bank layer overlaps with the conductive pattern layer is the same as a shape in which the first opening of the bank layer overlaps with a portion of the at least one line.
10 . The display panel of claim 1 , further comprising a conductive line at the second display area,
wherein the conductive line overlaps with each of the first electrode of the second light-emitting diode, the second opening of the bank layer, and the conductive pattern layer.
11 . The display panel of claim 10 , further comprising an additional second light-emitting diode at the second display area, and configured to emit the same color of light as that of the second light-emitting diode,
wherein the conductive line comprises a connection line electrically connecting the second light-emitting diode to the additional second light-emitting diode.
12 . The display panel of claim 1 , wherein the organic insulating layer has a first via contact hole for electrically connecting the first sub-pixel circuit to the first electrode of the first light-emitting diode, and a second via contact hole for electrically connecting the conductive pattern layer to the first electrode of the second light-emitting diode, and
wherein each of the first via contact hole and the second via contact hole overlaps with the bank layer.
13 . The display panel of claim 12 , wherein an angle between a first virtual line extending from a center of the first opening of the bank layer towards the first via contact hole and a virtual reference line passing the center of the first opening in a first direction is the same as an angle between a second virtual line extending from a center of the second opening of the bank layer towards the second via contact hole and a virtual reference line passing the center of the second opening in the first direction.
14 . An electronic apparatus comprising:
a display panel comprising:
a first display area; and
a second display area at least partially surrounded by the first display area, and comprising a transmission area; and
a component under the display panel, and corresponding to the second display area, wherein the display panel comprises:
a first sub-pixel circuit at the first display area, and comprising:
a first transistor comprising a first semiconductor layer and a first gate electrode;
a storage capacitor; and
a second transistor comprising a second semiconductor layer and
a second gate electrode;
an organic insulating layer above the first transistor and the second transistor;
a first light-emitting diode at the first display area, and electrically connected to the first sub-pixel circuit, the first light-emitting diode comprising a first electrode on the organic insulating layer;
a second light-emitting diode at the second display area, and comprising a first electrode on the organic insulating layer;
a bank layer having a first opening overlapping with the first electrode of the first light-emitting diode, and a second opening overlapping with the first electrode of the second light-emitting diode;
at least one line overlapping with the first electrode of the first light-emitting diode and the first opening of the bank layer; and
a conductive pattern layer at the second display area, and overlapping with the first electrode of the second light-emitting diode and the second opening of the bank layer,
wherein the at least one line comprises at least one of a driving power line, a data connection line, or a data line, and wherein the conductive pattern layer is located at a same layer as that of the at least one line.
15 . The electronic apparatus of claim 14 , wherein the component comprises a camera or a sensor.
16 . The electronic apparatus of claim 14 , wherein the display panel further comprises a lower organic insulating layer under the organic insulating layer, and
wherein the conductive pattern layer and the at least one line are located between the lower organic insulating layer and the organic insulating layer.
17 . The electronic apparatus of claim 14 , wherein the display panel further comprises:
a second sub-pixel circuit at a third display area between the first display area and the second display area, and electrically connected to the second light-emitting diode; and a conductive bus line extending towards the second display area at the third display area to electrically connect the second sub-pixel circuit to the second light-emitting diode.
18 . The electronic apparatus of claim 17 , wherein the conductive bus line is located at a same layer as that of any one of the first gate electrode, an electrode of the storage capacitor, or the second gate electrode.
19 . The electronic apparatus of claim 14 , wherein the conductive pattern layer comprises a plurality of conductive lines overlapping with the second opening of the bank layer, and
wherein an extension direction of each of the plurality of conductive lines is the same as an extension direction of the at least one line overlapping with the first opening of the bank layer.
20 . The electronic apparatus of claim 19 , wherein the at least one line of the display panel comprises a plurality of data lines and data connection lines, and
wherein a first distance between two adjacent conductive lines selected from among the plurality of conductive lines is the same as a second distance between two adjacent lines selected from among the plurality of data lines and data connection lines.
21 . The electronic apparatus of claim 19 , wherein the plurality of conductive lines are integrally connected to a connection conductive line crossing the plurality of conductive lines.
22 . The electronic apparatus of claim 14 , wherein the at least one line comprises a connection portion of a plurality of driving power lines that are physically connected to each other, and
wherein a shape or an area in which the second opening of the bank layer overlaps with the conductive pattern layer is the same as a shape or an area in which the first opening of the bank layer overlaps with the connection portion of the plurality of driving power lines.
23 . The electronic apparatus of claim 14 , wherein, in a plan view, a shape in which the second opening of the bank layer overlaps with the conductive pattern layer is the same as a shape in which the first opening of the bank layer overlaps with a portion of the at least one line.
24 . The electronic apparatus of claim 14 , wherein the display panel further comprises a conductive line at the second display area, and
wherein the conductive line overlaps with each of the first electrode of the second light-emitting diode, the second opening of the bank layer, and the conductive pattern layer.
25 . The electronic apparatus of claim 24 , wherein the display panel further comprises an additional second light-emitting diode at the second display area, and configured to emit the same color of light as that of the second light-emitting diode, and
wherein the conductive line comprises a connection line electrically connecting the second light-emitting diode to the additional second light-emitting diode.
26 . The electronic apparatus of claim 14 , wherein the organic insulating layer has a first via contact hole for electrically connecting the first sub-pixel circuit to the first electrode of the first light-emitting diode, and a second via contact hole for electrically connecting the conductive pattern layer to the first electrode of the second light-emitting diode, and
wherein an angle between a first virtual line extending from a center of the first opening of the bank layer towards the first via contact hole and a virtual reference line passing the center of the first opening in a first direction is the same as an angle between a second virtual line extending from a center of the second opening of the bank layer towards the second via contact hole and a virtual reference line passing the center of the second opening in the first direction.Join the waitlist — get patent alerts
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