Power amplifier circuit and communication device

Abstract

A power amplifier circuit includes an amplifier transistor having a collector terminal, an emitter terminal, and a base terminal, bias circuits, and a current limiter circuit. The bias circuit includes a constant current amplifier transistor that supplies direct-current bias current from an emitter terminal to the base terminal. The current limiter circuit includes a current limiting transistor an emitter terminal of which is connected to the bias circuit, a resistive element connected between the current limiting transistor and a power supply terminal, and a resistive element connected between the current limiting transistor and the constant current amplifier transistor. The bias circuit includes a constant current amplifier transistor that supplies direct-current bias current i3 from an emitter terminal to the base terminal.

1 . A power amplifier circuit comprising:
 a power supply terminal;   a first amplifier transistor that has a first terminal connected to the power supply terminal, a second terminal, and a first control terminal and that performs power amplification to a radio-frequency input signal input from the first control terminal to output a radio-frequency signal resulting from the power amplification from the first terminal;   a first bias circuit that outputs first direct-current bias current;   a second bias circuit that outputs second direct-current bias current; and   a modulation circuit,   wherein the first bias circuit includes
 a first transistor that has a third terminal, a fourth terminal, and a second control terminal and that supplies the first direct-current bias current from the fourth terminal to the first control terminal, 
   wherein the modulation circuit includes
 a second transistor which has a fifth terminal, a sixth terminal, and a third control terminal and the sixth terminal of which is connected to the fourth terminal, 
 a first resistive element connected between the fifth terminal and the power supply terminal, and 
 a second resistive element connected between the third control terminal and the second control terminal, and 
   wherein the second bias circuit includes
 a third transistor that has a seventh terminal, an eighth terminal, and a fourth control terminal and that supplies the second direct-current bias current from the eighth terminal to the first control terminal. 
   
     
     
         2 . The power amplifier circuit according to  claim 1 , further comprising:
 a control circuit that switches between the supply of the first direct-current bias current to the first control terminal and the supply of the second direct-current bias current to the first control terminal in accordance with a channel bandwidth of the radio-frequency input signal.   
     
     
         3 . A power amplifier circuit comprising:
 a power supply terminal;   a first amplifier transistor to which power supply voltage is supplied from the power supply terminal and which performs power amplification to a radio-frequency input signal;   a first bias circuit that supplies first direct-current bias current to the first amplifier transistor;   a second bias circuit that supplies second direct-current bias current to the first amplifier transistor;   a modulation circuit that is connected to the first bias circuit and the first amplifier transistor and that varies a magnitude of the first direct-current bias current in accordance with a magnitude of the power supply voltage; and   a control circuit that switches between the supply of the first direct-current bias current to the first amplifier transistor and the supply of the second direct-current bias current to the first amplifier transistor in accordance with a channel bandwidth of the radio-frequency input signal.   
     
     
         4 . The power amplifier circuit according to  claim 2 ,
 wherein, in an analog envelope tracking mode in which the power supply voltage applied to the power supply terminal is varied in a continuous voltage level in accordance with an envelope of the radio-frequency input signal, the control circuit causes the first bias circuit to supply the first direct-current bias current to the first amplifier transistor, and   wherein, in an average power tracking mode in which the power supply voltage is varied in multiple discrete voltage levels in accordance with average output power of a radio-frequency signal, the control circuit causes the second bias circuit to supply the second direct-current bias current to the first amplifier transistor.   
     
     
         5 . The power amplifier circuit according to  claim 2 ,
 wherein a first radio-frequency input signal of a first channel bandwidth and a second radio-frequency input signal of a second channel bandwidth wider than the first channel bandwidth are input into the first amplifier transistor,   wherein, in a case that the first radio-frequency input signal is input into the first amplifier transistor, the control circuit causes the first bias circuit to supply the first direct-current bias current to the first amplifier transistor, and   wherein, in a case that the second radio-frequency input signal is input into the first amplifier transistor, the control circuit causes the second bias circuit to supply the second direct-current bias current to the first amplifier transistor.   
     
     
         6 . The power amplifier circuit according to  claim 2 ,
 wherein a third radio-frequency input signal and a fourth radio-frequency input signal of a frequency band higher than that of the third radio-frequency input signal are input into the first amplifier transistor,   wherein, in a case that the third radio-frequency input signal is input into the first amplifier transistor, the control circuit causes the first bias circuit to supply the first direct-current bias current to the first amplifier transistor, and   wherein, in a case that the fourth radio-frequency input signal is input into the first amplifier transistor, the control circuit causes the second bias circuit to supply the second direct-current bias current to the first amplifier transistor.   
     
     
         7 . The power amplifier circuit according to  claim 1 ,
 wherein the power amplifier circuit includes a plurality of amplifier transistors that includes the first amplifier transistor and that is cascade-connected to each other.   
     
     
         8 . The power amplifier circuit according to  claim 7 ,
 wherein the first amplifier transistor is arranged at a last stage in the plurality of amplifier transistors.   
     
     
         9 . The power amplifier circuit according to  claim 7 ,
 wherein the plurality of amplifier transistors includes the first amplifier transistor, and
 a second amplifier transistor arranged at a previous state of the first amplifier transistor, and 
   wherein the modulation circuit and the second bias circuit are connected on a path between an output terminal of the second amplifier transistor and an input terminal of the first amplifier transistor in this order from the side closer to the second amplifier transistor.   
     
     
         10 . The power amplifier circuit according to  claim 1 , further comprising:
 a module laminate that has a first main surface and a second main surface that are opposed to each other,   wherein a first semiconductor integrated circuit including the first amplifier transistor, the first bias circuit, the modulation circuit, and the second bias circuit is arranged on the first main surface,   wherein a second semiconductor integrated circuit including the control circuit controlling the first amplifier transistor, the first bias circuit, and the second bias circuit is arranged on the second main surface, and   wherein, in the first semiconductor integrated circuit, the first bias circuit and the second bias circuit are arranged at positions closer to the second semiconductor integrated circuit than the first amplifier transistor.   
     
     
         11 . The power amplifier circuit according to  claim 9 , further comprising:
 a module laminate that has a first main surface and a second main surface that are opposed to each other,   wherein a first semiconductor integrated circuit including the first amplifier transistor, the second amplifier transistor, the first bias circuit, the modulation circuit, and the second bias circuit is arranged on the first main surface,   wherein a second semiconductor integrated circuit including the control circuit controlling the first amplifier transistor, the second amplifier transistor, the first bias circuit, and the second bias circuit is arranged on the second main surface,   wherein, in the first semiconductor integrated circuit, the first bias circuit and the second bias circuit are arranged at positions closer to the second semiconductor integrated circuit than the first amplifier transistor and the second amplifier transistor, and   wherein the modulation circuit is arranged so as to be closer to the second amplifier transistor than the second bias circuit.   
     
     
         12 . A power amplifier circuit comprising:
 a power supply terminal;   a first amplifier transistor that has a first terminal connected to the power supply terminal, a second terminal, and a first control terminal and that performs power amplification to a radio-frequency input signal input from the first control terminal to output a radio-frequency signal resulting from the power amplification from the first terminal;   a first bias circuit that outputs first direct-current bias current; and   a modulation circuit,   wherein the first bias circuit includes
 a first transistor that has a third terminal, a fourth terminal, and a second control terminal and that supplies the first direct-current bias current from the fourth terminal to the first control terminal, and 
   wherein the modulation circuit includes
 a second transistor that has a fifth terminal, a sixth terminal, and a third control terminal, 
 a first resistive element connected between the fifth terminal and the power supply terminal, 
 a second resistive element connected between the third control terminal and the second control terminal, and 
 a first switch which has a seventh terminal and an eighth terminal, the seventh terminal of which is connected to the sixth terminal, and the eighth terminal of which is connected to the fourth terminal. 
   
     
     
         13 . The power amplifier circuit according to  claim 12 , further comprising:
 a control circuit that switches between connection between the seventh terminal and the eighth terminal and non-connection therebetween in accordance with a channel bandwidth of the radio-frequency input signal.   
     
     
         14 . The power amplifier circuit according to  claim 13 ,
 wherein, in an analog envelope tracking mode in which the power supply voltage applied to the power supply terminal is varied in a continuous voltage level in accordance with an envelope of the radio-frequency input signal, the control circuit connects the seventh terminal to the eighth terminal, and   wherein, in an average power tracking mode in which the power supply voltage is varied in multiple discrete voltage levels in accordance with average output power of a radio-frequency signal, the control circuit does not connect the seventh terminal to the eighth terminal.   
     
     
         15 . The power amplifier circuit according to  claim 13 ,
 wherein a first radio-frequency input signal of a first channel bandwidth and a second radio-frequency input signal of a second channel bandwidth wider than the first channel bandwidth are input into the first amplifier transistor,   wherein, in a case that the first radio-frequency input signal is input into the first amplifier transistor, the control circuit connects the seventh terminal to the eighth terminal, and   wherein, in a case that the second radio-frequency input signal is input into the first amplifier transistor, the control circuit does not connect the seventh terminal to the eighth terminal.   
     
     
         16 . The power amplifier circuit according to  claim 13 ,
 wherein a third radio-frequency input signal and a fourth radio-frequency input signal of a frequency band higher than that of the third radio-frequency input signal are input into the first amplifier transistor,   wherein, in a case that the third radio-frequency input signal is input into the first amplifier transistor, the control circuit connects the seventh terminal to the eighth terminal, and   wherein, in a case that the fourth radio-frequency input signal is input into the first amplifier transistor, the control circuit does not connect the seventh terminal to the eighth terminal.   
     
     
         17 . A communication device comprising:
 a signal processing circuit that processes a radio-frequency signal; and   the power amplifier circuit according to  claim 1 , which transmits the radio-frequency signal between the signal processing circuit and an antenna.   
     
     
         18 . The communication device according to  claim 17 , further comprising:
 a power supply circuit that supplies power supply voltage to the power amplifier circuit,   wherein the power supply circuit includes a power supply control circuit that controls the power supply voltage so as to be a linear function of power amplitude of the radio-frequency signal.   
     
     
         19 . The power amplifier according to  claim 10 , wherein the module laminate includes a low-temperature co-fired ceramic (LTCC). 
     
     
         20 . The power amplifier according to  claim 10 , wherein the module laminate includes a high-temperature co-fired ceramic (HTCC).