US2024126874A1PendingUtilityA1

Security processing device, method and electronic device for handling attacks

Assignee: NUVOTON TECHNOLOGY CORPPriority: Oct 18, 2022Filed: May 31, 2023Published: Apr 18, 2024
Est. expiryOct 18, 2042(~16.2 yrs left)· nominal 20-yr term from priority
Inventors:Yen-Ju Chen
G06F 21/577H04L 63/1466H04L 63/1416G06F 21/554G06F 21/54G06F 21/575
50
PatentIndex Score
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Cited by
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Claims

Abstract

A security processing device for handling attacks including an attack detector, a programing time controller, a non-volatile memory device and a processing unit. The attack detector is used to detect whether an attack event occurs, and generate an attack trigger signal when the attack event occurs. The programing time controller is electrically connected to the attack detector, and used to update a first flag value when receiving the attack trigger signal. The non-volatile memory device is electrically connected to the program time controller, and used to store the first and the second flag values. The processing unit is electrically connected to the program time controller. When the security processing device is reset or boot-up, the programing time controller updates the second flag value and adjusts a time of a first instruction processed through the processing unit based on the first flag value and the second flag value.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A security processing device for handling attacks, comprising:
 an attack detector, configured to detect whether an attack event occurs, and generate an attack trigger signal when an occurrence of the attack event is detected;   a programing time controller, electrically connected to the attack detector, and configured to update a first flag value when the attack trigger signal is received;   a non-volatile memory device, electrically connected to the programing time controller, and configured to store the first flag value and a second flag value; and   a processing unit, electrically connected to the programing time controller, wherein when the security processing device is reset or boot-up, the programing time controller updates the second flag value and adjusts a time for the processing unit to process a first instruction or any one instruction based on the first flag value and the second flag value.   
     
     
         2 . The security processing device according to  claim 1 , wherein the security processing device updates the first flag value via inverting the first flag value, increasing the first flag value by a specific value or decreasing the first flag value by the specific value. 
     
     
         3 . The security processing device according to  claim 1 , wherein when the security processing device is reset or boot-up, and when the first flag value and the second flag value are different from each other, the programing time controller utilizes the first flag value to update the second flag value. 
     
     
         4 . The security processing device according to  claim 1 , wherein the programing time controller instructs the processing unit to expand the first instruction into a plurality of second instructions to adjust the time for the processing unit to process the first instruction. 
     
     
         5 . The security processing device according to  claim 4 , wherein the plurality of the second instructions include the first instruction and a pseudo instruction, or
 the plurality of the second instructions are a plurality of instructions generated by disassembling the first instruction.   
     
     
         6 . The security processing device according to  claim 1 , wherein the programing time controller instructs the processing unit to delay a fetch time of the first instruction by a specific time to adjust the time for the processing unit to process the first instruction. 
     
     
         7 . The security processing device according to  claim 6 , wherein the specific time is determined by a random number. 
     
     
         8 . The security processing device according to  claim 1 , wherein the attack detector is further electrically connected to the processing unit,
 wherein the attack trigger signal is generated when the attack detector detects the occurrence of the attack event,   wherein after the processing unit receives the attack trigger signal, an attack information of the attack event is transmitted to the programing time controller, wherein the attack information includes an information of a specific instruction and a specific access address corresponding to the attack event, and   wherein when the any one instruction is the specific instruction, and an access address is the specific access address corresponding to the any one instruction, the programing time controller is allowed to adjust the time for the processing unit to process the any one instruction.   
     
     
         9 . An electronic device, comprising:
 a security processing device for handling attacks, including:
 an attack detector, configured to detect whether an attack event occurs, and generate an attack trigger signal when an occurrence of the attack event is detected; 
 a programing time controller, electrically connected to the attack detector, and configured to update a first flag value when the attack trigger signal is received; 
 a non-volatile memory device, electrically connected to the programing time controller, and configured to store the first flag value and a second flag value; and 
 a processing unit, electrically connected to the programing time controller, wherein when the security processing device is reset or boot-up, the programing time controller updates the second flag value and adjusts a time for the processing unit to process a first instruction or any one instruction processed based on the first flag value and the second flag value; and 
   a functional circuit, electrically connected to the security processing device.   
     
     
         10 . The electronic device according to  claim 9 , wherein the security processing device updates the first flag value via inverting the first flag value, increasing the first flag value by a specific value or decreasing the first flag value by the specific value. 
     
     
         11 . The electronic device according to  claim 9 , wherein when of the security processing device is reset or boot-up, and when the first flag value and the second flag value are different from each other, the programing time controller utilizes the first flag value to update the second flag value. 
     
     
         12 . The electronic device according to  claim 9 , wherein the programing time controller instructs the processing unit to expand the first instruction into a plurality of second instructions to adjust the time for the processing unit to process the first instruction processed. 
     
     
         13 . The electronic device according to  claim 12 , wherein the plurality of the second instructions include the first instruction and a pseudo instruction, or
 the plurality of the second instructions are a plurality of instructions generated by disassembling the first instruction.   
     
     
         14 . The electronic device according to  claim 9 , wherein the programing time controller instructs the processing unit to delay a fetch time of the first instruction by a specific time to adjust the time for the processing unit to process the first instruction processed. 
     
     
         15 . The electronic device according to  claim 14 , wherein the specific time is determined by a random number. 
     
     
         16 . The electronic device according to  claim 9 , wherein the attack detector is further electrically connected to the processing unit,
 wherein the attack trigger signal is generated when the attack detector detects the occurrence of the attack event,   wherein after the processing unit receives the attack trigger signal, an attack information of the attack event is transmitted to the programing time controller, wherein the attack information includes an information of a specific instruction and a specific access address corresponding to the attack event, and   wherein when the any instruction is the specific instruction, and an access address is the specific access address corresponding to the any one instruction, the programing time controller is allowed to adjust the time for the processing unit to process the any one instruction processed.   
     
     
         17 . A security processing method for handling attacks, which is implemented with a security processing device, comprising:
 an attack event detection step: an attack detector detecting whether an attack event occurs;   a flag value updating step: a programing time controller updating a first flag value when the attack event is detected;   a flag value comparison step: when the security processing device is reset or boot-up, the programing time controller comparing the first flag value and a second flag value; and   a processing step, when the first flag value does not match the second flag value, the programing time controller updating the second flag value and adjusting a time for the processing unit to process a first instruction or any one instruction.   
     
     
         18 . The security processing method according to  claim 17 , wherein in the processing step, the programing time controller instructs the processing unit to expand the first instruction into a plurality of second instructions, or
 the programing time controller instructs the processing unit to delay a fetch time of the first instruction by a specific time to adjust the time for the processing unit to process the first instruction.   
     
     
         19 . The security processing method according to  claim 17 , wherein in the flag value updating step, the processing unit further transmits an attack information to the programing time controller, wherein the attack information includes an information of a specific instruction and a specific access address corresponding to the attack event, and
 in the processing step, when the any one instruction is the specific instruction, and an access address of the any one instruction is the specific access address, the time for the processing unit to process the any one instruction is allowed to adjust.

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