US2024112978A1PendingUtilityA1
Electronic package
Est. expirySep 29, 2042(~16.2 yrs left)· nominal 20-yr term from priority
H10W 72/30H10W 42/121H10W 70/685H10W 70/611H10W 70/635H10W 40/255H10W 40/228H10W 74/114H10W 70/614H10W 90/734H10P 72/7424H10P 72/743H10P 72/74H10W 72/877H01L 23/3735H01L 23/3121H01L 23/5383H01L 23/5384H01L 23/562H01L 24/32H01L 2224/32225
55
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Claims
Abstract
An electronic package is provided. The electronic package includes an insulating carrier, a first conductive layer, and an electronic component. The first conductive layer is disposed over the insulating carrier. The electronic component is disposed over the first conductive layer and electrically connected to the first conductive layer, wherein the insulating carrier is configured to dissipate heat from the electronic component to a second side of the insulating carrier opposite to a first side facing the electronic component.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An electronic package, comprising:
an insulating carrier; and a first conductive layer disposed over the insulating carrier; and an electronic component disposed over the first conductive layer and electrically connected to the first conductive layer, wherein the insulating carrier is configured to dissipate heat from the electronic component to a second side of the insulating carrier opposite to a first side facing the electronic component.
2 . The electronic package as claimed in claim 1 , further comprising a second conductive layer separated from the first conductive layer, and the insulating carrier thermally connects to the first conductive layer and the second conductive layer.
3 . The electronic package as claimed in claim 2 , wherein the first conductive layer is closer to the electronic component than the second conductive layer is.
4 . The electronic package as claimed in claim 3 , wherein the electronic component is electrically connected to the second conductive layer.
5 . The electronic package as claimed in claim 2 , wherein the insulating carrier is electrically insulated from the first conductive layer and the second conductive layer.
6 . The electronic package as claimed in claim 2 , wherein the second conductive layer is configured to support a passive component, and the passive component is electrically connected to the electronic component.
7 . The electronic package as claimed in claim 1 , further comprising:
a dielectric layer encapsulating the first conductive layer and the electronic component; and a circuit layer disposed over and electrically connected to the electronic component.
8 . The electronic package as claimed in claim 7 , wherein the dielectric layer further contacts a side surface of the insulating carrier.
9 . An electronic package, comprising:
a ceramic layer; a cladding layer over the ceramic carrier, wherein a lateral surface of the ceramic layer is exposed by the cladding layer; an electronic component attached to the cladding layer; and an encapsulant encapsulating the electronic component and covering the lateral surface of the ceramic layer.
10 . The electronic package as claimed in claim 9 , wherein a stiffness of the cladding layer is less than a stiffness of the ceramic layer.
11 . The electronic package as claimed in claim 9 , wherein the lateral surface of the ceramic layer directly contacts the encapsulant.
12 . The electronic package as claimed in claim 9 , further comprising a second cladding layer separated from the cladding layer, wherein the cladding layer is configured to support the electronic component, and wherein the second cladding layer is at a side of the ceramic layer opposite to the electronic component and configured to restrain a warpage
13 . The electronic package as claimed in claim 12 , wherein the second cladding layer has a lateral surface misaligned with the lateral surface of the ceramic layer.
14 . The electronic package as claimed in claim 12 , wherein patterns or thicknesses of the cladding layer and the second cladding layer are substantially symmetrically arranged with respect to the ceramic layer.
15 . An electronic package, comprising:
a heat dissipation core having a first surface and a second surface opposite to the first surface; a stress buffer structure adjacent to at least one of the first surface and the second surface of the heat dissipation core; an electronic component disposed over the stress buffer structure; and a dielectric structure encapsulating the stress buffer structure and the electronic component.
16 . The electronic package as claimed in claim 15 , further comprising:
a circuit layer over the electronic component; and a conductive via penetrating the dielectric structure and electrically connecting the circuit layer to the stress buffer structure.
17 . The electronic package as claimed in claim 16 , wherein the stress buffer structure comprises a first conductive layer on the first surface of the heat dissipation core and a second conductive layer on the second surface of the heat dissipation core, and the conductive via is electrically connected to the first conductive layer or the second conductive layer.
18 . The electronic package as claimed in claim 15 , wherein in a cross-sectional view, the heat dissipation core comprises a first portion and a second portion separated from the first portion, and the dielectric structure is further filled in a space separating the first portion and the second portion of the heat dissipation core.
19 . The electronic package as claimed in claim 18 , further comprising a conductive via penetrating the dielectric structure in the space and electrically connected to the electronic component.
20 . The electronic package as claimed in claim 18 , wherein the space comprises a through hole defined by the heat dissipation core.Join the waitlist — get patent alerts
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