US2024107198A1PendingUtilityA1

Image capturing element and image capturing apparatus

58
Assignee: NIKON CORPPriority: Mar 31, 2021Filed: Sep 29, 2023Published: Mar 28, 2024
Est. expiryMar 31, 2041(~14.7 yrs left)· nominal 20-yr term from priority
Inventors:Sota Nakanishi
H10F 39/811H10F 39/809H10F 39/12H04N 25/772H04N 25/79
58
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Claims

Abstract

An image capturing element includes a first substrate having a plurality of pixel blocks including at least one pixel, the plurality of pixel blocks being arranged to be aligned in a row direction and a column direction, and a second substrate having a plurality of control blocks including a conversion unit which converts a signal output from the pixel into a digital signal and a through electrode unit configured to output the signal converted into the digital signal by the conversion unit, the plurality of control blocks being arranged to be aligned in the row direction and the column direction.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An image capturing element comprising:
 a first substrate having a plurality of pixel blocks including at least one pixel, the plurality of pixel blocks being arranged to be aligned in a row direction and a column direction; and   a second substrate having a plurality of control blocks including a conversion unit which converts a signal which is output from the pixel into a digital signal and a through electrode unit configured to output the signal converted into the digital signal by the conversion unit, the plurality of control blocks being arranged to be aligned in the row direction and the column direction.   
     
     
         2 . The image capturing element according to  claim 1 , wherein
 the through electrode unit has a first region for arranging a through electrode which outputs the signal, and a second region where an element is not arranged.   
     
     
         3 . The image capturing element according to  claim 2 , wherein
 the plurality of pixel blocks has a first pixel block including a first pixel, and a second pixel block including a second pixel,   the plurality of control blocks has a first control block including a first conversion unit which converts a first signal output from the first pixel into a digital signal and a first through electrode unit configured to output the first signal converted into the digital signal by the first conversion unit, and a second control block including a second conversion unit which converts a second signal output from the second pixel into a digital signal and a second through electrode unit configured to output the second signal converted into the digital signal by the second conversion unit,   the first pixel block and the second pixel block are arranged to be aligned next to each other in the first substrate, and   the first region included in the first control block and the second region included in the second control block are arranged to be aligned next to each other in the second substrate.   
     
     
         4 . The image capturing element according to  claim 3 , wherein
 the first pixel block and the second pixel block are arranged to be aligned next to each other in the row direction, and   the first region included in the first control block and the second region included in the second control block are arranged to be aligned next to each other in the row direction.   
     
     
         5 . The image capturing element according to  claim 4 , wherein
 the first conversion unit included in the first control block and the second conversion unit included in the second control block are arranged to be aligned next to each other in the row direction.   
     
     
         6 . The image capturing element according to  claim 5 , comprising:
 a third substrate having an image processing unit which performs image processing on the first signal output to the first through electrode unit and the second signal output to the second through electrode unit.   
     
     
         7 . The image capturing element according to  claim 6 , wherein
 the image processing unit performs processing of decreasing an amount of data of the first signal output to the first through electrode unit and an amount of data of the second signal output to the second through electrode unit.   
     
     
         8 . The image capturing element according to  claim 6 , wherein
 the image processing unit performs processing of compressing the first signal output to the first through electrode unit and the second signal output to the second through electrode unit.   
     
     
         9 . The image capturing element according to  claim 6 , wherein
 the image processing unit has a first processing block including a first processing unit which performs image processing on the first signal output to the first through electrode unit, and a second processing block including a second processing unit which performs image processing on the second signal output to the second through electrode unit.   
     
     
         10 . The image capturing element according to  claim 9 , wherein
 the first processing unit performs processing of decreasing an amount of data of the first signal output to the first through electrode unit, and   the second processing unit performs processing of decreasing an amount of data of the second signal output to the second through electrode unit.   
     
     
         11 . The image capturing element according to  claim 9 , wherein
 the first processing unit performs processing of compressing the first signal output to the first through electrode unit, and   the second processing unit performs processing of compressing the second signal output to the second through electrode unit.   
     
     
         12 . The image capturing element according to  claim 9 , wherein
 the first processing unit included in the first processing block and the second processing unit included in the second processing block are arranged to be aligned next to each other in the row direction.   
     
     
         13 . The image capturing element according to  claim 3 , wherein
 the first pixel block and the second pixel block are arranged to be aligned next to each other in the column direction, and   the first region included in the first control block and the second region included in the second control block are arranged to be aligned next to each other in the column direction.   
     
     
         14 . The image capturing element according to  claim 13 , wherein
 the first region included in the first control block and the second region included in the second control block are arranged between the first conversion unit included in the first control block and the second conversion unit included in the second control block in the column direction.   
     
     
         15 . The image capturing element according to  claim 13 , comprising
 a third substrate having an image processing unit which performs image processing on the first signal output to the first through electrode unit and the second signal output to the second through electrode unit.   
     
     
         16 . The image capturing element according to  claim 15 , wherein
 the image processing unit performs processing of decreasing an amount of data of the first signal output to the first through electrode unit and an amount of data of the second signal output to the second through electrode unit.   
     
     
         17 . The image capturing element according to  claim 15 , wherein
 the image processing unit performs processing of compressing the first signal output to the first through electrode unit and the second signal output to the second through electrode unit.   
     
     
         18 . The image capturing element according to  claim 15 , wherein
 the image processing unit has a first processing block including a first processing unit which performs image processing on the first signal output to the first through electrode unit, and a second processing block including a second processing unit which performs image processing on the second signal output to the second through electrode unit.   
     
     
         19 . The image capturing element according to  claim 18 , wherein
 the first processing unit performs processing of decreasing an amount of data of the first signal output to the first through electrode unit, and   the second processing unit performs processing of decreasing an amount of data of the second signal output to the second through electrode unit.   
     
     
         20 . The image capturing element according to  claim 18 , wherein
 the first processing unit performs processing of compressing the first signal output to the first through electrode unit, and   the second processing unit performs processing of compressing the second signal output to the second through electrode unit.   
     
     
         21 . The image capturing element according to  claim 1 , wherein
 the control block has a drive unit which outputs a control signal for controlling the pixel.   
     
     
         22 . The image capturing element according to  claim 21 , wherein
 the pixel has a photoelectric conversion unit which converts light into an electric charges, and a transfer unit configured to transfer the electric charges converted by the photoelectric conversion unit, and   the drive unit outputs a transfer control signal for controlling the transfer unit.   
     
     
         23 . The image capturing element according to  claim 22 , wherein
 the pixel has a discharge unit configured to discharge the electric charges converted by the photoelectric conversion unit, and   the drive unit outputs a discharge control signal for controlling the discharge unit.   
     
     
         24 . An imaging apparatus comprising the image capturing element according to  claim 1 .

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