Microelectronic devices including stadium structures, and related memory devices and electronic systems

Abstract

A microelectronic device includes a stack structure having tiers each including conductive material vertically neighboring insulative material and conductive contact structures. The stack structure is divided into blocks horizontally extending in parallel in a first direction and separated from one another in a second direction orthogonal to the first direction by insulative slot structures. At least one of the blocks includes a lower stadium structure having steps including edges of some of the tiers, and an upper stadium structure vertically overlying the lower stadium structure and having additional steps including edges of some other of the tiers vertically overlying the some of the tiers. The additional steps have greater tread widths in the first direction than the steps. Conductive contact structures are in contact with the additional steps of the upper stadium structure of the at least one of the blocks. Memory devices and electronic systems are also described.

What is claimed is: 
     
         1 . A microelectronic device, comprising:
 a stack structure comprising tiers each including conductive material vertically neighbouring insulative material, the stack structure divided into blocks horizontally extending in parallel in a first direction and separated from one another in a second direction orthogonal to the first direction by insulative slot structures, at least one of the blocks comprising:
 a lower stadium structure having steps comprising edges of some of the tiers; 
 an upper stadium structure vertically overlying the lower stadium structure and having additional steps comprising edges of some other of the tiers vertically overlying the some of the tiers, the additional steps having greater tread widths in the first direction than the steps; and 
   conductive contact structures in contact with at least some of the additional steps of the upper stadium structure of the at least one of the blocks.   
     
     
         2 . The microelectronic device of  claim 1 , wherein at least some of the additional steps of the upper stadium structure individually have a group of the conductive contact structures within a horizontal area thereof. 
     
     
         3 . The microelectronic device of  claim 2 , wherein the group of the conductive contact structures within the horizontal area of one additional step of the at least some of the additional steps comprise at least three of the conductive contact structures, at least one of the at least three of the conductive contact structures offset in the first direction from at least one other of the at least three of the conductive contact structures. 
     
     
         4 . The microelectronic device of  claim 2 , wherein the group of the conductive contact structures within the horizontal area of one additional step of the at least some of the additional steps comprises:
 two of the conductive contact structures substantially aligned with one another in the first direction; and   two other of the conductive contact structures substantially aligned with one another in the first direction and offset from the two of the conductive contact structures in the first direction.   
     
     
         5 . The microelectronic device of  claim 4 , wherein both of the two of the conductive contact structures are interposed in the second direction between the two other of the conductive contact structures. 
     
     
         6 . The microelectronic device of  claim 5 , wherein the two of the conductive contact structures are located relatively closer, in the first direction, to a vertically lower additional step of the at least some of the additional steps than the two other of the conductive contact structures. 
     
     
         7 . The microelectronic device of  claim 5 , wherein the two of the conductive contact structures are located relatively closer, in the first direction, to a vertically higher additional step of the at least some of the additional steps than the two other of the conductive contact structures. 
     
     
         8 . The microelectronic device of  claim 4 , wherein only one of the two of the conductive contact structures is interposed in the second direction between the two other of the conductive contact structures. 
     
     
         9 . The microelectronic device of  claim 2 , wherein at least some other of the additional steps of the upper stadium structure individually have only one of the conductive contact structures within a horizontal area thereof. 
     
     
         10 . The microelectronic device of  claim 2 , further comprising additional insulative slot structures partially vertically extending through the at least one of the blocks and individually horizontally extending partially through the upper stadium structure in the first direction, the additional insulative slot structures individually interposed in the second direction between neighboring conductive contact structures of the group of the conductive contact structures. 
     
     
         11 . The microelectronic device of  claim 10 , wherein the additional insulative slot structures comprise at least three of the additional insulative slot structures. 
     
     
         12 . The microelectronic device of  claim 10 , wherein a path in the first direction of at least one of the additional insulative slot structures in at least partially non-linear. 
     
     
         13 . The microelectronic device of  claim 12 , wherein the at least one of the additional insulative slot structures horizontally weaves between a row of the conductive contact structures and an additional row of the conductive contact structures horizontally neighboring the row of the conductive contact structures in the second direction, the conductive contact structures of the row of the conductive contact structures horizontally offset in the first direction from the conductive contact structures of the additional row of the conductive contact structures. 
     
     
         14 . The microelectronic device of  claim 10 , wherein a path in the first direction of at least one of the additional insulative slot structures is substantially linear. 
     
     
         15 . The microelectronic device of  claim 10 , further comprising an other insulative slot structure partially vertically extending through the at least one of the blocks and horizontally extending completely across the at least one of the blocks in the second direction, a portion of the other insulative slot structure located with a horizontal area of the upper stadium structure. 
     
     
         16 . The microelectronic device of  claim 1 , further comprising additional contact structures vertically extending completely through the at least one of the blocks, some of the additional contact structures positioned within a horizontal area of the upper stadium structure and horizontally offset from the conductive contact structures. 
     
     
         17 . A memory device, comprising:
 a stack structure comprising blocks separated from one another by dielectric slot structures and each including a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, at least one of the blocks comprising:
 stadium structures comprising:
 an upper stadium structure comprising staircase structures having steps comprising edges of an upper group of the tiers of the stack structure; and 
 lower stadium structures vertically below the upper stadium structure and each comprising additional staircase structures having additional steps comprising edges of a lower group of the tiers of the stack structure, the additional steps having smaller tread dimensions in a first direction than the steps; 
 
 crest regions interposed between the stadium structures in the first direction; and 
 bridge regions integral with the crest regions and interposed between the dielectric slot structures and the stadium structures in a second direction orthogonal to the first direction; 
   groups of contact structures in contact with and substantially confined within horizontal areas of the steps of the upper stadium structure of the at least one of the blocks, each of the groups of contact structures individually comprising:
 two of the contact structures substantially aligned with one another in the first direction; and 
 two other of the contact structures substantially aligned with one another in the first direction and offset from the two of the contact structures in the first direction; and 
   strings of memory cells vertically extending through a portion of the at least one of the blocks neighboring the upper stadium structure in the first direction.   
     
     
         18 . The memory device of  claim 17 , wherein each of the steps of the upper stadium structure has a tread width in the first direction within a range of from about 1200 nm to about 1800 nm. 
     
     
         19 . The memory device of  claim 17 , further comprising:
 three additional dielectric slot structures vertically extending through the upper group of the tiers of the at least one of the blocks and horizontally extending in the first direction partially through one of the staircase structures of the upper stadium structure; and   a further dielectric slot structure vertically extending through the upper group of the tiers of the at least one of the blocks and horizontally extending in the second direction completely across the at least one of the blocks, the further dielectric slot structure horizontally overlapping the upper stadium structure and horizontally offset from each of the three additional dielectric slot structures in the first direction.   
     
     
         20 . The memory device of  claim 19 , wherein two of the three additional dielectric slot structures horizontally extend in non-linear paths through a horizontal area of the one of the staircase structures of the upper stadium structure. 
     
     
         21 . The memory device of  claim 20 , wherein one of the three additional dielectric slot structures interposed, in the second direction, between the two of the three additional dielectric slot structures horizontally extend in a substantially linear path through the horizontal area of the one of the staircase structures of the upper stadium structure. 
     
     
         22 . The memory device of  claim 19 , further comprising additional contact structures vertically extending completely through the at least one of the blocks and positioned within a horizontal area of the one of the staircase structures of the upper stadium structure. 
     
     
         23 . The memory device of  claim 22 , wherein one of the three additional dielectric slot structures horizontally overlaps a row of the additional contact structures extending in the first direction, the one of the three additional dielectric slot structures partially vertically extending through and in physical contact with some of the additional contact structures of the row of the additional contact structures. 
     
     
         24 . An electronic system, comprising:
 an input device;   an output device;   a processor device operably coupled to the input device and the output device; and   a memory device operably coupled to the processor device and comprising:
 a stack structure having tiers each including conductive material vertically neighbouring insulative material, the stack structure divided into blocks separated from one another by dielectric slot structures, at least one of the blocks comprising:
 a lower stadium structure having steps comprising edges of a vertically lower group of the tiers; and 
 an uppermost stadium structure having additional steps comprising edges of a vertically upper group of the tiers, the additional steps having greater horizontal dimensions than the steps; 
 
 contact structures in contact with the additional steps of the uppermost stadium structure of the at least one of the blocks, a group of the contact structures substantially confined within a horizontal area of the one of the additional steps and comprising at least one contact structure diagonally horizontally positioned relative to at least one other contact structure; 
 additional dielectric slot structures vertically extending through the vertically upper group of the tiers of the at least one of the blocks and partially horizontally overlapping the uppermost stadium structure, the additional dielectric slot structures horizontally alternating with rows of the contact structures; and 
 strings of memory cells vertically extending through the at least one of the blocks. 
   
     
     
         25 . The electronic system of  claim 24 , wherein at least some of the additional dielectric slot structures horizontally extend in non-linear paths through a portion of a horizontal area of the uppermost stadium structure of the at least one of the blocks. 
     
     
         26 . The electronic system of  claim 24 , wherein some of the contact structures within at least one of the rows of the contact structures are electrically ganged together by way of conductive routing structures vertically overlying the at least one of the blocks. 
     
     
         27 . The electronic system of  claim 24 , wherein the memory device comprises a 3D NAND Flash memory device.