US2024055397A1PendingUtilityA1

Through-substrate connections for recessed semiconductor dies

Assignee: MICRON TECHNOLOGY INCPriority: Aug 9, 2022Filed: Aug 9, 2022Published: Feb 15, 2024
Est. expiryAug 9, 2042(~16 yrs left)· nominal 20-yr term from priority
H10W 90/811H10W 70/657H10W 70/611H10W 70/417H10W 70/65H10W 70/20H10W 44/20H10W 90/297H10W 90/293H10W 90/724H10W 90/722H10W 44/203H10W 90/00H10W 90/701H10W 70/698H10W 70/68H01L 25/0655H01L 23/5386H01L 23/49575H01L 23/492H01L 23/66H01L 23/49513H01L 23/49805H01L 25/18
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Claims

Abstract

This document discloses techniques, apparatuses, and systems for providing a semiconductor device assembly with through-substrate connections for recessed semiconductor dies. A semiconductor device assembly is described that includes a substrate having a first cavity and a second cavity. A first connective element is located at a side surface of the first cavity and a second connective element is located at a side surface of the second cavity. The semiconductor device assembly include a first semiconductor die and a second semiconductor die implemented at the first cavity and the second cavity, respectively. The first semiconductor die includes a third connective element at an edge surface of the die. The second semiconductor die includes a fourth connective element at an edge surface of the die. The dies are implemented at the cavities and connected through the connective elements to electrically couple the first die to the second die.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device assembly, comprising:
 a substrate including:
 a first cavity having a first connective element at a first side surface of the first cavity; and 
 a second cavity having a second connective element at a second side surface of the second cavity; 
   a first semiconductor die disposed in the first cavity and having a third connective element at a first edge surface of the first semiconductor die; and   a second semiconductor die disposed in the second cavity and having a fourth connective element at a second edge surface of the second semiconductor die,   wherein the first semiconductor die and the second semiconductor die are electrically coupled through the first connective element, the second connective element, the third connective element, and the fourth connective element.   
     
     
         2 . The semiconductor device assembly of  claim 1 , further comprising circuitry internal to the substrate and coupling the first connective element to the second connective element. 
     
     
         3 . The semiconductor device assembly of  claim 1 , wherein:
 the first connective element and the third connective element comprise a conductive contact; and   the semiconductor device assembly further comprises a solder joint coupling the first connective element and the third connective element.   
     
     
         4 . The semiconductor device assembly of  claim 1 , wherein:
 the first connective element and the third connective element comprise an inductor; and   the first connective element and the third connective element electrically couple through an inductive coupling.   
     
     
         5 . The semiconductor device assembly of  claim 1 , wherein:
 the first connective element and the third connective element comprise an optical element; and   the first connective element and the third connective element electrically couple through an optical connection.   
     
     
         6 . The semiconductor device assembly of  claim 1 , wherein an upper surface of the first semiconductor die is flush with or recessed from an upper surface of the substrate. 
     
     
         7 . The semiconductor device assembly of  claim 1 , further comprising a third semiconductor die mounted to at least one of: an upper surface of the first semiconductor die, an upper surface of the second semiconductor die, an upper surface of the substrate, or a lower surface of the substrate. 
     
     
         8 . The semiconductor device assembly of  claim 1 , wherein the first and second connective elements are spaced from an upper surface of the substrate. 
     
     
         9 . The semiconductor device assembly of  claim 1 , wherein:
 the substrate further includes a fifth connective element at a bottom surface of the first cavity; and   the first semiconductor die has a sixth connective element at a bottom surface of the first semiconductor die, the sixth connective element coupled with the fifth connective element effective to electrically couple the first semiconductor die and the substrate.   
     
     
         10 . The semiconductor device assembly of  claim 1 , further comprising a third semiconductor die disposed in the first cavity below the first semiconductor die. 
     
     
         11 . A method of assembly for a semiconductor device, comprising:
 providing a substrate including:
 a first cavity having a first connective element at a first side surface of the first cavity; and 
 a second cavity having a second connective element at a second side surface of the second cavity; 
   providing a first semiconductor die at the first cavity, the first semiconductor die having a third connective element at a first edge surface of the first semiconductor die;   providing a second semiconductor die at the second cavity, the second semiconductor die having a fourth connective element at a second edge surface of the second semiconductor die; and   coupling the first semiconductor die and the second semiconductor die through the first connective element, the second connective element, the third connective element, and the fourth connective element effective to electrically couple the first semiconductor die and the second semiconductor die.   
     
     
         12 . The method of  claim 11 , further comprising etching the substrate to create the first cavity and the second cavity. 
     
     
         13 . The method of  claim 11 , further comprising depositing a layer of conductive material and a layer of non-conductive material at the substrate between the first cavity and the second cavity to create circuitry coupling the first connective element and the second connective element. 
     
     
         14 . The method of  claim 11 , further comprising coupling the first connective element and the third connective element through a solder joint to electrically couple the first semiconductor die and the substrate. 
     
     
         15 . The method of  claim 11 , further comprising coupling the first connective element and the third connective element through an inductive coupling to electrically couple the first semiconductor die and the substrate. 
     
     
         16 . The method of  claim 11 , further comprising coupling the first connective element and the third connective element through an optical connection to electrically couple the first semiconductor device to the substrate. 
     
     
         17 . A substrate comprising:
 a first cavity recessed in a top surface of the substrate, the first cavity having a first connective element exposed at a side surface of the first cavity;   a second cavity recessed in the top surface of the substrate, the second cavity having a second connective element exposed at a side surface of the second cavity; and   circuitry internal to the substrate and coupling the first connective element and the second connective element.   
     
     
         18 . The substrate of  claim 17 , wherein the first connective element comprises: a conductive contact, an inductor, or an optical element. 
     
     
         19 . The substrate of  claim 17 , wherein the substrate further includes a third connective element exposed at a bottom surface of the first cavity. 
     
     
         20 . The substrate of  claim 19 , wherein the first cavity and the second cavity have different depths.

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