US2024047583A1PendingUtilityA1

Semiconductor device, method for manufacturing semiconductor device, module, and electronic device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Dec 2, 2014Filed: Oct 10, 2023Published: Feb 8, 2024
Est. expiryDec 2, 2034(~8.3 yrs left)· nominal 20-yr term from priority
Inventors:Kosei Noda
H10P 30/202H10D 30/6755H10D 86/481H10D 86/441H10D 86/451H10D 86/425H10D 86/60H10D 99/00H10D 62/86H10D 62/80H10D 30/6757H10D 30/6734H10D 30/6713H10D 30/6729H10D 86/423H10D 87/00H10P 30/208H10P 30/22H01L 29/7869H01L 29/24H01L 29/78696H01L 29/66969H01L 21/425H01L 29/22H10K 59/122H10K 59/1216H10K 59/124H10K 59/1213H10K 59/131H10K 50/11
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Claims

Abstract

A semiconductor device with stable electrical characteristics is provided. Alternatively, a semiconductor device having normally-off electrical characteristics is provided. A semiconductor device includes a gate electrode, a gate insulator, and an oxide semiconductor, the oxide semiconductor contains fluorine in a channel formation region, and a fluorine concentration in the channel formation region is higher than or equal to 1×10 20 atoms/cm 3 and lower than or equal to 1×10 22 atoms/cm 3 . Note that fluorine is added by an ion implantation method.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising
 a first transistor including a first channel formation region, the first channel formation region comprising silicon;   a second transistor comprising an oxide semiconductor, the oxide semiconductor including a second channel formation region;   a capacitor,   wherein a first conductor overlaps with the first channel formation region,   wherein a second conductor is in contact with the oxide semiconductor,   wherein a third conductor is in contact with the oxide semiconductor and is electrically connected to the first conductor,   wherein the third conductor is one electrode of the capacitor,   wherein a first insulator is positioned over the first conductor,   wherein the oxide semiconductor is positioned over the first insulator,   wherein a second insulator is positioned the oxide semiconductor, the second conductor, and the third conductor,   wherein the second insulator include an opening,   wherein a fourth conductor is positioned in the opening, and   wherein the fourth conductor is electrically connected to the second conductor.   
     
     
         2 . A semiconductor device comprising
 a first transistor including a first channel formation region, the first channel formation region comprising silicon;   a second transistor comprising an oxide semiconductor, the oxide semiconductor including a second channel formation region;   a capacitor,   wherein a first conductor overlaps with the first channel formation region,   wherein a second conductor is in contact with the oxide semiconductor,   wherein a third conductor is in contact with the oxide semiconductor and is electrically connected to the first conductor,   wherein the third conductor is one electrode of the capacitor,   wherein a first insulator is positioned over the first conductor,   wherein the oxide semiconductor is positioned over the first insulator,   wherein a second insulator is positioned the oxide semiconductor, the second conductor, and the third conductor,   wherein the second insulator include an opening,   wherein a fourth conductor is positioned in the opening,   wherein the fourth conductor is electrically connected to the second conductor,   wherein the oxide semiconductor is interposed between a fifth conductor and a sixth conductor, and   wherein the fifth conductor, the sixth conductor, and the second channel formation region overlap with one another.   
     
     
         3 . A semiconductor device comprising
 a first transistor including a first channel formation region, the first channel formation region comprising silicon;   a second transistor comprising an oxide semiconductor, the oxide semiconductor including a second channel formation region;   a capacitor,   wherein a first conductor overlaps with the first channel formation region,   wherein a second conductor is in contact with the oxide semiconductor,   wherein a third conductor is in contact with the oxide semiconductor and is electrically connected to the first conductor,   wherein the third conductor is one electrode of the capacitor,   wherein a first insulator is positioned over the first conductor,   wherein the oxide semiconductor is positioned over the first insulator,   wherein a second insulator is positioned the oxide semiconductor, the second conductor, and the third conductor,   wherein the second insulator include an opening,   wherein a fourth conductor is positioned in the opening,   wherein the fourth conductor is electrically connected to the second conductor,   wherein a fifth conductor overlaps with the second channel formation region, and   wherein a part of a bottom surface of the fifth conductor is positioned under a bottom surface of the second channel formation region.   
     
     
         4 . A semiconductor device comprising
 a first transistor including a first channel formation region, the first channel formation region comprising silicon;   a second transistor comprising an oxide semiconductor, the oxide semiconductor including a second channel formation region;   a capacitor,   wherein a first conductor overlaps with the first channel formation region,   wherein a second conductor is in contact with the oxide semiconductor,   wherein a third conductor is in contact with the oxide semiconductor and is electrically connected to the first conductor,   wherein the third conductor is one electrode of the capacitor,   wherein a first insulator is positioned over the first conductor,   wherein the oxide semiconductor is positioned over the first insulator,   wherein a second insulator is positioned the oxide semiconductor, the second conductor, and the third conductor,   wherein the second insulator include an opening,   wherein a fourth conductor is positioned in the opening,   wherein the fourth conductor is electrically connected to the second conductor,   wherein the oxide semiconductor is interposed between a fifth conductor and a sixth conductor, and the fifth conductor is positioned over the oxide semiconductor,   wherein the fifth conductor, the sixth conductor, and the second channel formation region overlap with one another, and   wherein a part of a bottom surface of the fifth conductor is positioned under a bottom surface of the second channel formation region.

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