Apparatuses and methods for securing an access protection scheme

Abstract

A device includes a memory. The device also includes a controller. The controller includes a register configured to store an indication of whether an ability of a received command to alter an access protection scheme of the memory is enabled. The received command may alter the access an access protection scheme of the memory responsive to the indication.

What is claimed is: 
     
         1 . A memory device, comprising:
 one or more specific data (CSD) registers; and   a controller configured to:   receive a write request comprising:
 a data field comprising a configuration value; 
 an address in the one or more CSD registers to write the configuration value to; 
 an indication of a request type; 
 a message authentication code (MAC); and 
 a write counter value. 
   
     
     
         2 . The memory device of  claim 1 , wherein the memory device is an embedded multimedia card (eMMC). 
     
     
         3 . The memory device of  claim 2 , wherein the indication has a value of 0x0006 indicating that the request type corresponds to an authenticated write request for programming configuration of the memory device using the configuration value. 
     
     
         4 . The memory device of  claim 3 , wherein an authentication of the write request is determined based on the MAC and the write counter value. 
     
     
         5 . The memory device of  claim 4 , in response to the determining that the write request is authenticated, wherein the controller is configured to enable updating a write protection scheme of the memory device in response to the configuration value having a first value. 
     
     
         6 . The memory device of  claim 5 , wherein updating the write protection scheme comprises updating one or more fields in the one or more CSD registers. 
     
     
         7 . The memory device of  claim 6 , wherein the write protection scheme comprises a type of write protection set up by using a CMD command. 
     
     
         8 . The memory device of  claim 7 , wherein the CMD command comprises a CMD28 to set up a write protection for a write protection group. 
     
     
         9 . The memory device of  claim 5 , wherein the write protection scheme comprises an entire device write protection, a work protection group (WPG) write protection, or a boot partition write protection. 
     
     
         10 . The memory device of  claim 5 , wherein the controller is configured to disable updating the write protection scheme of the memory device in response to the configuration value having a second value. 
     
     
         11 . The memory device of  claim 10 , wherein using a CMD28 to set up a write protection is disabled. 
     
     
         12 . A method for enabling updating a write protection scheme in a memory device, comprising:
 receiving, via a controller of the memory device, a write request comprising:
 a data field comprising a configuration value; 
 an address in one or more CSD registers of the memory device to write the configuration value to; 
 an indication of a request type; 
 a message authentication code (MAC); and 
 a write counter value; 
   determining, via the controller, an authentication of the write request based on the MAC and the write counter value; and   writing the configuration value to the address in the one or more CSD registers in response to authentication of the write request.   
     
     
         13 . The method of  claim 12 , wherein the memory device is an embedded multimedia card (eMMC). 
     
     
         14 . The method of  claim 13 , wherein the indication has a value of 0x0006 indicating that the request type corresponds to an authenticated write request for programming configuration of the memory device using the configuration value. 
     
     
         15 . The method of  claim 14 , wherein determining the authentication of the write request comprises:
 generating, by the controller, a calculated MAC based on at least the write counter value;   comparing, by the controller, the calculated MAC with the MAC of the write request; and   in response to determining that the calculated MAC is not equal to the MAC of the write request, determining that the write request is not authenticated.   
     
     
         16 . A tangible non-transitory machine readable storage medium configured to store instructions, which when executed by a controller of a memory device, cause the controller to:
 receive a write request comprising:
 a data field comprising a configuration value; 
 an address in one or more CSD registers of the memory device to write the configuration value to; 
 an indication of a request type; 
 a message authentication code (MAC); and 
 a write counter value; 
   determine an authentication of the write request based on the MAC and the write counter value; and   in response to determining that the write request is authenticated, write the configuration value to the address in the one or more CSD registers.   
     
     
         17 . The tangible non-transitory machine readable storage medium of  claim 16 , wherein the memory device is an embedded multimedia card (eMMC). 
     
     
         18 . The tangible non-transitory machine readable storage medium of  claim 16 , wherein the instructions further cause the controller to:
 generate a calculated MAC based on at least the write counter value;   compare the calculated MAC with the MAC of the write request; and   in response to determining that the calculated MAC is not equal to the MAC of the write request, determine that the write request is not authenticated.   
     
     
         19 . The tangible non-transitory machine readable storage medium of  claim 16 , wherein the instructions cause the controller to enable updating a write protection scheme of the memory device in response to the configuration value having a first value. 
     
     
         20 . The tangible non-transitory machine readable storage medium of  claim 19 , wherein the instructions cause the controller to disable updating the write protection scheme of the memory device in response to the configuration value having a second value.