2-d material semiconductor device

Abstract

A method includes forming a 2-D material semiconductor layer over a substrate; forming source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, while leaving a portion of the 2-D material semiconductor layer exposed by the source/drain electrodes; forming a first gate dielectric layer over the portion of the 2-D material semiconductor layer by using a physical deposition process; forming a second gate dielectric layer over the first gate dielectric layer by using a chemical deposition process, in which a thickness of the first gate dielectric layer is less than a thickness of the second gate dielectric layer; and forming a gate electrode over the second gate dielectric layer.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate;   a 2-D material semiconductor layer over the substrate;   source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, wherein each of the source/drain electrodes comprises a 2-D material semimetal layer and a metal over the 2-D material semimetal layer;   a first gate dielectric layer covering the 2-D material semiconductor layer and the source/drain electrodes; and   a gate electrode over the first gate dielectric layer.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the 2-D material semimetal layer is thinner than the metal. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the first gate dielectric layer is in contact with the 2-D material semimetal layer of the source/drain electrodes. 
     
     
         4 . The semiconductor device of  claim 1 , further comprising a second gate dielectric layer between the 2-D material semiconductor layer and the first gate dielectric layer, and the first gate dielectric layer is thicker than the second gate dielectric layer. 
     
     
         5 . The semiconductor device of  claim 1 , wherein a thickness of the first gate dielectric layer is in a range from about 5 nm to about 30 nm. 
     
     
         6 . The semiconductor device of  claim 1 , further comprising 2-D material layers in contact with the opposite sides of the 2-D material semiconductor layer, wherein the source/drain electrodes are over the 2-D material layers, respectively. 
     
     
         7 . The semiconductor device of  claim 6 , wherein the 2-D material layers are made of graphene. 
     
     
         8 . A semiconductor device, comprising:
 a substrate;   a 2-D material semiconductor layer over the substrate;   2-D material layers covering opposite sides of the 2-D material semiconductor layer, wherein the 2-D material layers are made of graphene;   source/drain electrodes over the 2-D material layers, respectively;   a first gate dielectric layer covering the 2-D material semiconductor layer and the source/drain electrodes; and   a gate electrode over the first gate dielectric layer.   
     
     
         9 . The semiconductor device of  claim 8 , wherein the 2-D material semiconductor layer is made of transition metal dichalcogenide (TMD). 
     
     
         10 . The semiconductor device of  claim 8 , further comprising a second gate dielectric layer over the first gate dielectric layer, wherein the gate electrode is in contact with a top surface of the second gate dielectric layer. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the second gate dielectric layer is thicker than the first gate dielectric layer. 
     
     
         12 . The semiconductor device of  claim 10 , wherein a bottom surface of the gate electrode is higher than a topmost end of the first gate dielectric layer. 
     
     
         13 . The semiconductor device of  claim 10 , wherein the first gate dielectric layer and the second gate dielectric layer are made of a same material. 
     
     
         14 . The semiconductor device of  claim 8 , wherein each of the source/drain electrodes comprises a 2-D material semimetal layer and a metal over the 2-D material semimetal layer. 
     
     
         15 . A semiconductor device, comprising:
 a substrate;   a 2-D material semiconductor layer over the substrate;   source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, wherein each of the source/drain electrodes comprises a 2-D material semimetal layer and a metal over the 2-D material semimetal layer;   a first gate dielectric layer covering the 2-D material semiconductor layer and the source/drain electrodes;   a second gate dielectric layer over the first gate dielectric layer; and   a gate electrode over the second gate dielectric layer.   
     
     
         16 . The semiconductor device of  claim 15 , wherein the second gate dielectric layer is thicker than the first gate dielectric layer. 
     
     
         17 . The semiconductor device of  claim 15 , wherein a bottom surface of the gate electrode is higher than a topmost end of the first gate dielectric layer. 
     
     
         18 . The semiconductor device of  claim 15 , wherein the second gate dielectric layer has a flat top surface profile, while the first gate dielectric layer has a stepped top surface profile. 
     
     
         19 . The semiconductor device of  claim 15 , further comprising 2-D material layers in contact with the opposite sides of the 2-D material semiconductor layer, wherein the source/drain electrodes are over the 2-D material layers, respectively. 
     
     
         20 . The semiconductor device of  claim 19 , wherein the 2-D material layers are made of graphene.