Silicon carbide semiconductor device

Abstract

In an intermediate region between an active region and an edge termination region, on a front surface of a semiconductor substrate, a gate polysilicon wiring layer is provided via an insulating layer in which a gate insulating film and a field oxide film are stacked sequentially. An inner peripheral end of the field oxide film is positioned directly beneath the gate polysilicon wiring layer, which extends inward from the field oxide film and terminates on the gate insulating film. At the surface of the insulating layer directly beneath the gate polysilicon wiring layer, on the inner peripheral end of the field oxide film, a drop is formed by a difference in thickness due to whether the field oxide film is present. A distance from the drop to a contact hole of the active region is 21 μm or less.

What is claimed is: 
     
         1 . A semiconductor device having, on a semiconductor substrate containing silicon carbide and having a first main surface and a second main surface opposite to each other,
 an active region through which a main current flows,   a termination region surrounding a periphery of the active region in a top view of the semiconductor device, and   an intermediate region provided between the active region and the termination region in the top view of the semiconductor device,   the semiconductor device comprising:
 a first semiconductor region of a first conductivity type, provided in the semiconductor substrate; 
 a second semiconductor region of a second conductivity type, provided between the first main surface of the semiconductor substrate and the first semiconductor region, in the active region and the intermediate region; 
 a third semiconductor region of the first conductivity type, selectively provided in the active region, between the first main surface of the semiconductor substrate and the second semiconductor region; 
 a gate insulating film covering the first main surface of the semiconductor substrate and provided in contact with a region of the second semiconductor region, the region being between the first semiconductor region and the third semiconductor region; 
 a gate electrode provided, via the gate insulating film, on the region of the second semiconductor region between the first semiconductor region and the third semiconductor region; 
 a fourth semiconductor region of the second conductivity type, provided in the intermediate region, between the first main surface of the semiconductor substrate and the second semiconductor region, the fourth semiconductor region having an impurity concentration that is higher than an impurity concentration of the second semiconductor region; 
 a field oxide film provided in the intermediate region, on the gate insulating film on the first main surface of the semiconductor substrate; 
 a gate polysilicon wiring layer provided on the field oxide film and surrounding a periphery of the active region in the top view of the semiconductor device, an inner peripheral end of the gate polysilicon wiring layer being connected to the gate electrode, the gate polysilicon wiring layer facing the fourth semiconductor region in a depth direction with the field oxide film and the gate insulating film intervening therebetween; 
 an interlayer insulating film covering the gate electrode and the gate polysilicon wiring layer; 
 a first contact hole penetrating through the interlayer insulating film in the depth direction and exposing the first main surface of the semiconductor substrate; 
 a first electrode electrically connected to the second semiconductor region, the third semiconductor region, and the fourth semiconductor region via the first contact hole; and 
 a second electrode provided at the second main surface of the semiconductor substrate, wherein 
 the gate polysilicon wiring layer extends farther to the active region than is the inner peripheral end of the field oxide film, and, at an inner portion of the gate polysilicon wiring layer, faces the fourth semiconductor region in the depth direction via the gate insulating film only, and 
 the field oxide film has an inner peripheral end that is
 closer to the termination region than is the first contact hole, and 
 positioned with a distance in a range of not more than 21 μm apart from the first contact hole. 
 
   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the inner peripheral end of the field oxide film is positioned with a distance in a range of 5 μm to 10 μm apart from the first contact hole.   
     
     
         3 . The semiconductor device according to  claim 1 , further comprising
 a third electrode provided at the first main surface of the semiconductor substrate and having a same potential as that of the first electrode, wherein   the third electrode is electrically connected to a region in the semiconductor substrate via a second contact hole that penetrates through the interlayer insulating film in the depth direction, and   the inner peripheral end of the field oxide film is positioned not more than 21 μm apart from the second contact hole.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein
 the gate electrode extends linearly in a direction parallel to the first main surface of the semiconductor substrate and reaches the intermediate region from the active region, the gate electrode having longitudinal ends connected to the gate polysilicon wiring layer.   
     
     
         5 . The semiconductor device according to  claim 1 , further comprising
 a trench penetrating through the third semiconductor region and the second semiconductor region in the depth direction from the first main surface of the semiconductor substrate and reaching the first semiconductor region, the trench extending linearly from the active region to the intermediate region in a direction parallel to the first main surface of the semiconductor substrate, wherein   the gate electrode is provided in the trench via the gate insulating film and is connected to the gate polysilicon wiring layer at longitudinal ends of the trench.