US2024021697A1PendingUtilityA1

Gate Structure of Semiconductor Device and Method of Forming Same

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jan 22, 2021Filed: Aug 7, 2023Published: Jan 18, 2024
Est. expiryJan 22, 2041(~14.5 yrs left)· nominal 20-yr term from priority
H10P 14/43H10D 64/669H10D 84/83135H10D 84/85H10D 64/017H10D 64/01H10D 84/0172H10D 64/667H10D 30/797H10D 62/021H10D 64/021H10D 84/038H10D 84/0177H10D 84/853H10D 84/0193H10D 64/01318H01L 29/4966H01L 21/28556H01L 29/66545H01L 29/401
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Claims

Abstract

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate stack over an active region of a substrate. The gate stack includes a gate dielectric layer and a first work function layer over the gate dielectric layer. The first work function layer includes a plurality of first layers and a plurality of second layers arranged in an alternating manner over the gate dielectric layer. The plurality of first layers include a first material. The plurality of second layers include a second material different from the first material.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A device comprising:
 a gate stack over an active region of a substrate, wherein the gate stack comprises:
 a gate dielectric layer; and 
 a first work function layer over the gate dielectric layer, the first work function layer comprising a plurality of first layers and a plurality of second layers arranged in an alternating manner over the gate dielectric layer, the plurality of first layers comprising a first material, the plurality of second layers comprising a second material different from the first material. 
   
     
     
         2 . The device of  claim 1 , wherein the first material is a first metal nitride material. 
     
     
         3 . The device of  claim 2 , wherein the first metal nitride material comprises TaN or TiN. 
     
     
         4 . The device of  claim 2 , wherein the second material is a second metal nitride material. 
     
     
         5 . The device of  claim 4 , wherein the second metal nitride material comprises TaN or TiN. 
     
     
         6 . The device of  claim 1 , wherein the gate stack further comprises a second work function layer over the first work function layer, the second work function layer comprising a third material different from the first material and the second material. 
     
     
         7 . The device of  claim 6 , wherein the first work function layer is a p-type work function layer, and wherein the second work function layer is an n-type work function layer. 
     
     
         8 . A device comprising:
 a gate stack over an active region of a substrate, wherein the gate stack comprises:
 a gate dielectric layer; 
 a p-type work function layer over the gate dielectric layer, the p-type work function layer comprising a pair of layers repeated two of more times, the pair of layers comprising a first layer comprising a first metal nitride material and a second layer comprising a second metal nitride material different from the first metal nitride material; and 
 an n-type work function layer over the p-type work function layer. 
   
     
     
         9 . The device of  claim 8 , wherein the first metal nitride material comprises TaN or TiN. 
     
     
         10 . The device of  claim 9 , wherein the second metal nitride material comprises TaN or TiN. 
     
     
         11 . The device of  claim 10 , wherein a ratio of a fraction of Ta to a fraction of Ti in the p-type work function layer is from 0.5 to 0.95. 
     
     
         12 . The device of  claim 8 , wherein the gate stack further comprises:
 a glue layer over the n-type work function layer; and   a conductive layer over the glue layer.   
     
     
         13 . The device of  claim 8 , wherein a first thickness of the first layer is different from a second thickness of the second layer. 
     
     
         14 . A device comprising:
 a first active region of a semiconductor material;   a first transistor on the first active region, the first transistor being p-type, the first transistor comprising a first gate stack, the first gate stack comprising:
 a gate dielectric layer; 
 a first layer of a first metal nitride material over the gate dielectric layer; 
 a first layer of a second metal nitride material over the first layer of the first metal nitride material, the first metal nitride material being a different material than the second metal nitride material; 
 a second layer of the first metal nitride material over the first layer of a second metal nitride material; 
 a second layer of the second metal nitride material over the second layer of the first metal nitride material; and 
 a conductive fill layer over the second layer of the second metal nitride material. 
   
     
     
         15 . The device of  claim 14 , wherein the first metal nitride material comprises TaN or TiN. 
     
     
         16 . The device of  claim 15 , wherein the second metal nitride material comprises TaN or TiN. 
     
     
         17 . The device of  claim 16 , wherein the first layer of the first metal nitride material, the first layer of the second metal nitride material, the second layer the first metal nitride material, and the second layer of the second metal nitride material are collectively comprised by a p-type work function metal layer, and wherein a ratio of a fraction of Ta to a fraction of Ti in the p-type work function metal layer is 0.5 to 0.95. 
     
     
         18 . The device of  claim 17 , wherein the fraction of Ta in the p-type work function metal layer is 7 at % to 40 at %, and the fraction of Ti in the p-type work function metal layer is 7 at % to 40 at %. 
     
     
         19 . The device of  claim 14  further comprising a work function metal between the second layer of the second metal nitride material and the conductive fill layer. 
     
     
         20 . The device of  claim 19  further comprising a glue layer between the work function metal and the conductive fill layer.

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