High voltage resistor with high voltage junction termination

Abstract

High voltage semiconductor devices are described herein. An exemplary semiconductor device includes a substrate, a first doped region disposed in the substrate and doped with a first doping polarity, and a second doped region disposed in the substrate and horizontally outside the first doped region. The second doped region is doped with a second doping polarity opposite to the first doping polarity. The semiconductor device further includes a third doped region disposed completely within the first doped region. The third doped region is doped with the second doping polarity. The semiconductor device further includes a first isolation structure disposed over the first doped region and spaced apart from the second doped region and the third doped region, a second isolation structure disposed over the first doped region and the third doped region, and a resistor disposed over the first isolation structure.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate;   a first doped region disposed in the substrate and doped with a first doping polarity;   a second doped region disposed in the substrate and horizontally outside the first doped region, the second doped region being doped with a second doping polarity opposite to the first doping polarity;   a third doped region disposed completely within the first doped region, the third doped region being doped with the second doping polarity;   a first isolation structure disposed over the first doped region and spaced apart from the second doped region and the third doped region;   a second isolation structure disposed over the first doped region and the third doped region; and   a resistor disposed over the first isolation structure.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the first doped region and the second doped region form a first P/N junction, and
 the first doped region and the third doped region form a second P/N junction.   
     
     
         3 . The semiconductor device of  claim 2 , wherein the third doped region is spaced apart from the second isolation structure. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the resistor is electrically coupled to the first doped region. 
     
     
         5 . The semiconductor device of  claim 1 , further comprising a field plate disposed over a portion of the second doped region and electrically coupled to the second doped region. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the first doped region includes a drift region and a doped well in the drift region, wherein the drift region has a lower doping concentration level than the doped well. 
     
     
         7 . The semiconductor device of  claim 6 , wherein the third doped region is embedded in the drift well and adjacent to the doped well. 
     
     
         8 . The semiconductor device of  claim 1 , further comprising a first heavily doped region disposed in the first doped region and a second heavily doped region disposed in the second doped region,
 wherein the first heavily doped region is disposed between the first isolation structure and the second isolation structure.   
     
     
         9 . A semiconductor device, comprising:
 a substrate;   a first doped region disposed in the substrate;   a second doped region disposed adjacent to the first doped region and being doped oppositely from the first doped region, wherein the first doped region and the second doped region form a P/N junction;   a first isolation structure disposed directly over the first doped region;   a resistor disposed directly over the first isolation structure; and   a high voltage junction termination (HVJT) device comprising:
 a first heavily doped region disposed in the first doped region, 
 a second heavily doped region disposed in the second doped region, 
 a cathode terminal formed on the first heavily doped region, 
 an anode terminal formed on the second heavily doped region, and 
 a second isolation structure disposed between the first heavily doped region and the second heavily doped region, 
 wherein the HVJT device is electrically coupled to the resistor. 
   
     
     
         10 . The semiconductor device of  claim 9 , wherein from a top view, the resistor includes an elongated square shape, a spiral shape, an elongated zig-zag shape, or an S-shape,
 wherein the semiconductor device further comprises a contact formed on a segment of the resistor, wherein the segment of the resistor is disposed between two distal ends of the resistor.   
     
     
         11 . The semiconductor device of  claim 10 , wherein the segment of the resistor is located substantially at a midpoint of the resistor. 
     
     
         12 . The semiconductor device of  claim 9 , further comprising a field plate disposed over a portion of the second isolation structure and over a portion of the second doped region. 
     
     
         13 . The semiconductor device of  claim 9 , wherein the P/N junction is a first P/N junction, the semiconductor device further comprising a doped well disposed in the first doped region and below the second isolation structure,
 wherein the doped well is doped oppositely from the first doped region, and   wherein the doped well and the first doped region form a second P/N junction.   
     
     
         14 . The semiconductor device of  claim 13 , wherein the doped well is disposed immediately below the second isolation structure. 
     
     
         15 . The semiconductor device of  claim 13 , wherein the doped well is spaced apart from the second isolation structure. 
     
     
         16 . A semiconductor device, comprising:
 a first doped region disposed surrounded by a second doped region, wherein the first doped region is doped with a first doping polarity, and wherein the second doped region is doped with a second doping polarity opposite to the first doping polarity;   a first isolation structure disposed directly over the first doped region;   a first heavily doped region and a second heavily doped region disposed completely in the first doped region, wherein the first isolation structure is disposed between the first heavily doped region and the second heavily doped region;   a second isolation structure and a third isolation structure disposed adjacent to the first heavily doped region and the second heavily doped region, respectively;   a first field plate disposed over the second isolation structure, wherein a portion of the first field plate is over the second doped region; and   a second field plate disposed over the third isolation structure, wherein a portion of the second field plate is over the second doped region.   
     
     
         17 . The semiconductor device of  claim 16 , further comprising a resistor disposed directly over the first isolation structure and electrically coupled to the first heavily doped region. 
     
     
         18 . The semiconductor device of  claim 17 , further comprising a contact over a non-distal portion of the resistor. 
     
     
         19 . The semiconductor device of  claim 16 , further comprising:
 a third heavily doped region and a fourth heavily doped region disposed in the second doped region; and   a third field plate over the third heavily doped region and a fourth field plate over the fourth heavily doped region.   
     
     
         20 . The semiconductor device of  claim 16 , wherein the first doped region includes a doped well inside a drift region,
 wherein the drift region has a lower doping concentration level than the doped well, and   wherein the first heavily doped region, the second heavily doped region, and a portion of the first isolation structure are disposed in the doped well.