Capacitor and method for forming the same
Abstract
An integrated circuit (IC) structure includes a semiconductor substrate, a bottom electrode routing, a capacitor structure, a top electrode routing. The bottom electrode routing is over the semiconductor substrate. The capacitor structure is over the bottom electrode routing. The capacitor structure includes a bottom metal layer, a middle metal layer above the bottom metal layer, and a top metal layer above the middle metal layer. When viewed in a plan view, the top metal layer has opposite straight edges extending along a first direction and opposite square wave-shaped edges connecting the opposite straight edges, the square wave-shaped edges each comprise alternating first and second segments extending along a second direction perpendicular to the first direction, and third segments each connecting adjacent two of the first and second segments, wherein the third segments extend along the first direction.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An integrated circuit (IC) structure, comprising:
a semiconductor substrate; a bottom electrode routing over the semiconductor substrate; a capacitor structure over the bottom electrode routing, the capacitor structure comprising:
a bottom metal layer;
a middle metal layer above the bottom metal layer; and
a top metal layer above the middle metal layer, wherein when viewed in a plan view, the top metal layer has opposite straight edges extending along a first direction and opposite square wave-shaped edges connecting the opposite straight edges, the square wave-shaped edges each comprise alternating first and second segments extending along a second direction perpendicular to the first direction, and third segments each connecting adjacent two of the first and second segments, wherein the third segments extend along the first direction;
a top electrode routing over the capacitor structure; a first metal via extending from the bottom electrode routing to the top electrode routing, the first metal via contacting the top and bottom metal layers and spaced apart from the middle metal layer; and a second metal via extending from the bottom electrode routing to the top electrode routing, the second metal via contacting the middle metal layer and spaced apart from the bottom and top metal layers.
2 . The IC structure of claim 1 , wherein a distance between the first metal via and one of the straight edges of the top metal layer is in a range from about 0.1 to 1 times a maximum dimension of the first metal via in the plan view.
3 . The IC structure of claim 1 , wherein the middle metal layer has opposite straight edges, a first one of the straight edges of the top metal layer is laterally set beck from a first one of the straight edges of the middle metal layer, and a second one of the straight edges of the top metal layer is laterally set back from a second one of the straight edges of the middle metal layer.
4 . The IC structure of claim 1 , wherein the middle metal layer has opposite straight edges, a first distance between the straight edges of the middle metal layer is greater than a second distance between the straight edges of the top metal layer.
5 . The IC structure of claim 1 , wherein the bottom metal layer of the capacitor structure has opposite straight edges and opposite square wave-shaped edges extending between the straight edges of the bottom metal layer.
6 . The IC structure of claim 1 , wherein the middle metal layer of the capacitor structure has opposite straight edges and opposite square wave-shaped edges extending between the opposite straight edges of the middle metal layer.
7 . The IC structure of claim 6 , wherein the square wave-shaped edges of the middle metal layer overlap with the square wave-shaped edges of the top metal layer.
8 . The IC structure of claim 1 , wherein the first metal via has a square top-view pattern, a rectangular top-view pattern, a circle top-view pattern, or an elliptical top-view pattern.
9 . The IC structure of claim 1 , further comprising a first metal layer above the top metal layer, the first metal layer being electrically connected to the middle metal layer, and electrically isolated from the bottom and top metal layers.
10 . The IC structure of claim 9 , further comprising a second metal layer above the first metal layer, the second metal layer being electrically connected to the bottom and top metal layers, and electrically isolated from the middle and first metal layers.
11 . An integrated circuit (IC) structure, comprising:
a semiconductor substrate; a first electrode routing over the semiconductor substrate; a second electrode routing over the first electrode routing; and a capacitor structure connected between the first and second electrode routings, the capacitor structure comprising:
a first metal plate serving to receive a first voltage potential and having opposite linear edges extending along a first direction; and
a second metal plate over the first metal plate, the second metal plate serving to receive a second voltage potential different than the first voltage potential, the second metal plate having opposite linear edges extending along the first direction, a first distance between the opposite linear edges of the first metal plate being different than a second distance between the opposite linear edges of the second metal plate.
12 . The IC structure of claim 11 , wherein the first distance between the linear edges of the first metal plate is greater than the second distance between the linear edges of the second metal plate.
13 . The IC structure of claim 11 , wherein the first distance between the linear edges of the first metal plate is less than the second distance between the linear edges of the second metal plate.
14 . The IC structure of claim 11 , wherein the capacitor structure further comprises a third metal plate over the second metal plate, and the third metal plate serves to receive the first voltage potential.
15 . The IC structure of claim 11 , wherein the first metal plate has a non-linear edge connecting the linear edges of the first metal plate, the non-linear edge has a plurality of notches arranged along a second direction perpendicular to the first direction.
16 . The IC structure of claim 11 , wherein the second metal plate has a non-linear edge connecting the linear edges of the second metal plate, the non-linear edge has a plurality of notches arranged along a second direction perpendicular to the first direction.
17 . An integrated circuit (IC) structure, comprising:
a substrate; a first electrode routing over the substrate; a lower metal plate over the first electrode routing, the lower metal plate having a first through hole therein; a middle metal plate over the lower metal plate, the middle metal plate having a second through hole therein and opposite straight edges, wherein from a cross-sectional view, the middle metal plate has a larger width than the lower metal plate, and the second through hole non-overlaps the first through hole; a first via extending through the lower metal plate and the middle metal plate, wherein the first via is in contact with the lower metal plate, and the first via is further in the second through hole of the middle metal plate and spaced apart from the middle metal plate; and a second via extending through the lower metal plate and the middle metal plate, wherein the second via is in contact with the middle metal plate, and the second via is further in the first through hole of the lower metal plate and spaced apart from the lower metal plate, and in a plan view, the second via has a distance to one of the straight edges of the middle metal plate in a range from about 0.1 to 1 times a maximum dimension of the second via.
18 . The IC structure of claim 17 , wherein the lower metal plate has a square wave-shaped edge from the plan view.
19 . The IC structure of claim 17 , wherein the middle metal plate has a square wave-shaped edge extending between the opposite straight edges from the plan view.
20 . The IC structure of claim 17 , further comprising:
an upper metal plate over the middle metal plate, wherein from the cross-sectional view, the upper metal plate has a smaller width than the middle metal plate.Join the waitlist — get patent alerts
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