Semiconductor device comprising a mosfet having a resurf region and higher peak impurity concentration diffusion region in the resurf region

Abstract

Provided is a semiconductor device including: an N-type diffusion layer being a second region, formed in a surface portion of a P-type diffusion layer being a first region, to function as a RESURF region; an N-type buried diffusion layer being a third region formed in a bottom portion of the second region, close to a high-side circuit; and a MOSFET using the second region as a drift layer. The MOSFET includes a thermal oxide film formed between an N-type diffusion layer being a fourth region serving as a drain region and an N-type diffusion layer being a sixth region serving as a source region, and an N-type diffusion layer being a seventh region formed below the thermal oxide film. The seventh region has an end portion close to a low-side circuit, being closer to the low-side circuit than an end portion of the third region close to the low-side circuit.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate formed with a first region of a first conductivity type;   a second region that is a RESURF region of a second conductivity type formed in a surface portion of the first region to separate a high-side circuit and a low-side circuit from each other;   a third region of the second conductivity type formed at least in a bottom portion of the second region close to the high-side circuit, having a higher peak concentration of impurities than the second region; and   a MOSFET using the second region as a drift layer,   the MOSFET including:   a fourth region serving as a drain region of the second conductivity type formed in the surface portion of the second region, having a higher peak concentration of impurities than the second region;   a sixth region serving as a source region of the second conductivity type formed in a surface portion of a fifth region of the first conductivity type or in a surface portion of the first region, in a region closer to the low-side circuit than the fourth region, the fifth region being provided in the second region;   a first thermal oxide film formed on a surface of the second region, in a region between the fourth region and the sixth region; and   a seventh region of the second conductivity type formed in a surface portion of the second region below the first thermal oxide film, having a higher peak concentration of impurities than the second region,   wherein an end portion of the seventh region close to the low-side circuit is located closer to the low-side circuit than an end portion of the third region close to the low-side circuit,   the third region reaches a surface of the second region, and   when the third region has an impurity concentration indicated as N [cm −3 ] and a depth indicated as t [cm], the relationship, N×t>6.9×10 11  cm −2 , is satisfied.   
     
     
         2 . A semiconductor device comprising:
 a semiconductor substrate formed with a first region of a first conductivity type;   a second region that is a RESURF region of a second conductivity type formed in a surface portion of the first region to separate a high-side circuit and a low-side circuit from each other;   a third region of the second conductivity type formed at least in a bottom portion of the second region close to the high-side circuit, having a higher peak concentration of impurities than the second region; and   a MOSFET using the second region as a drift layer,   the MOSFET including:   a fourth region serving as a drain region of the second conductivity type formed in the surface portion of the second region, having a higher peak concentration of impurities than the second region;   a sixth region serving as a source region of the second conductivity type formed in a surface portion of a fifth region of the first conductivity type or in a surface portion of the first region, in a region closer to the low-side circuit than the fourth region, the fifth region being provided in the second region;   a first thermal oxide film formed on a surface of the second region, in a region between the fourth region and the sixth region; and   a seventh region of the second conductivity type formed in a surface portion of the second region below the first thermal oxide film, having a higher peak concentration of impurities than the second region,   wherein an end portion of the seventh region close to the low-side circuit is located closer to the low-side circuit than an end portion of the third region close to the low-side circuit,   the semiconductor device further comprising:   a second thermal oxide film formed on the surface of the second region, closer to the high-side circuit than the fourth region; and   an eighth region of the second conductivity type formed below the second thermal oxide film, having a higher peak concentration of impurities than the second region, and   when the eighth region has an impurity concentration indicated as N1 and the seventh region has an impurity concentration indicated as N2, a relationship, 0.1×N1<N2<2×N1, is satisfied.   
     
     
         3 . A semiconductor device comprising:
 a semiconductor substrate formed with a first region of a first conductivity type;   a second region that is a RESURF region of a second conductivity type formed in a surface portion of the first region to separate a high-side circuit and a low-side circuit from each other;   a third region of the second conductivity type formed at least in a bottom portion of the second region close to the high-side circuit, having a higher peak concentration of impurities than the second region; and   a MOSFET using the second region as a drift layer,   the MOSFET including:   a fourth region serving as a drain region of the second conductivity type formed in the surface portion of the second region, having a higher peak concentration of impurities than the second region;   a sixth region serving as a source region of the second conductivity type formed in a surface portion of a fifth region of the first conductivity type or in a surface portion of the first region, in a region closer to the low-side circuit than the fourth region, the fifth region being provided in the second region;   a first thermal oxide film formed on a surface of the second region, in a region between the fourth region and the sixth region; and   a seventh region of the second conductivity type formed in a surface portion of the second region below the first thermal oxide film, having a higher peak concentration of impurities than the second region,   wherein an end portion of the seventh region close to the low-side circuit is located closer to the low-side circuit than an end portion of the third region close to the low-side circuit, and   the semiconductor device further comprising:   a ninth region of the second conductivity type formed in a region closer to the low-side circuit than the seventh region, having a peak concentration of impurities lower than the seventh region and higher than the second region.   
     
     
         4 . A semiconductor device comprising:
 a semiconductor substrate formed with a first region of a first conductivity type;   a second region that is a RESURF region of a second conductivity type formed in a surface portion of the first region to separate a high-side circuit and a low-side circuit from each other;   a third region of the second conductivity type formed at least in a bottom portion of the second region close to the high-side circuit, having a higher peak concentration of impurities than the second region; and   a MOSFET using the second region as a drift layer,   the MOSFET including:   a fourth region serving as a drain region of the second conductivity type formed in the surface portion of the second region, having a higher peak concentration of impurities than the second region;   a sixth region serving as a source region of the second conductivity type formed in a surface portion of a fifth region of the first conductivity type or in a surface portion of the first region, in a region closer to the low-side circuit than the fourth region, the fifth region being provided in the second region;   a first thermal oxide film formed on a surface of the second region, in a region between the fourth region and the sixth region; and   a seventh region of the second conductivity type formed in a surface portion of the second region below the first thermal oxide film, having a higher peak concentration of impurities than the second region,   wherein an end portion of the seventh region close to the low-side circuit is located closer to the low-side circuit than an end portion of the third region close to the low-side circuit, and   the semiconductor device further comprising:   a ninth region of the second conductivity type formed discretely in a region closer to the low-side circuit than the seventh region, having a peak concentration of impurities equal to or lower than the seventh region and higher than the second region.   
     
     
         5 . A semiconductor device comprising:
 a semiconductor substrate formed with a first region of a first conductivity type;   a second region that is a RESURF region of a second conductivity type formed in a surface portion of the first region to separate a high-side circuit and a low-side circuit from each other;   a third region of the second conductivity type formed at least in a bottom portion of the second region close to the high-side circuit, having a higher peak concentration of impurities than the second region; and   a MOSFET using the second region as a drift layer,   the MOSFET including:   a fourth region serving as a drain region of the second conductivity type formed in the surface portion of the second region, having a higher peak concentration of impurities than the second region;   a sixth region serving as a source region of the second conductivity type formed in a surface portion of a fifth region of the first conductivity type or in a surface portion of the first region, in a region closer to the low-side circuit than the fourth region, the fifth region being provided in the second region;   a first thermal oxide film formed on a surface of the second region, in a region between the fourth region and the sixth region; and   a seventh region of the second conductivity type formed in a surface portion of the second region below the first thermal oxide film, having a higher peak concentration of impurities than the second region,   wherein an end portion of the seventh region close to the low-side circuit is located closer to the low-side circuit than an end portion of the third region close to the low-side circuit, and   the seventh region includes a portion close to the low-side circuit, having an impurity concentration higher than a portion close to the high-side circuit.   
     
     
         6 . A semiconductor device comprising:
 a semiconductor substrate formed with a first region of a first conductivity type;   a second region that is a RESURF region of a second conductivity type formed in a surface portion of the first region to separate a high-side circuit and a low-side circuit from each other;   a third region of the second conductivity type formed at least in a bottom portion of the second region close to the high-side circuit, having a higher peak concentration of impurities than the second region; and   a MOSFET using the second region as a drift layer,   the MOSFET including:   a fourth region serving as a drain region of the second conductivity type formed in the surface portion of the second region, having a higher peak concentration of impurities than the second region;   a sixth region serving as a source region of the second conductivity type formed in a surface portion of a fifth region of the first conductivity type or in a surface portion of the first region, in a region closer to the low-side circuit than the fourth region, the fifth region being provided in the second region;   a first thermal oxide film formed on a surface of the second region, in a region between the fourth region and the sixth region; and   a seventh region of the second conductivity type formed in a surface portion of the second region below the first thermal oxide film, having a higher peak concentration of impurities than the second region,   wherein an end portion of the seventh region close to the low-side circuit is located closer to the low-side circuit than an end portion of the third region close to the low-side circuit,   the semiconductor device further comprising:   a polysilicon layer formed on an end portion of the first thermal oxide film close to the high-side circuit, and   an end portion of the polysilicon layer close to the low-side circuit is located closer to the low-side circuit than an end portion of the seventh region close to the low-side circuit.   
     
     
         7 . The semiconductor device according to  claim 1 , wherein
 the MOSFET functions as a bootstrap diode that supplies power to the high-side circuit.   
     
     
         8 . The semiconductor device according to  claim 2 , wherein
 the MOSFET functions as a bootstrap diode that supplies power to the high-side circuit.   
     
     
         9 . The semiconductor device according to  claim 3 , wherein
 the MOSFET functions as a bootstrap diode that supplies power to the high-side circuit.   
     
     
         10 . The semiconductor device according to  claim 4 , wherein
 the MOSFET functions as a bootstrap diode that supplies power to the high-side circuit.   
     
     
         11 . The semiconductor device according to  claim 5 , wherein
 the MOSFET functions as a bootstrap diode that supplies power to the high-side circuit.   
     
     
         12 . The semiconductor device according to  claim 6 , wherein
 the MOSFET functions as a bootstrap diode that supplies power to the high-side circuit.   
     
     
         13 . An integrated circuit comprising the semiconductor device according to  claim 1 . 
     
     
         14 . An integrated circuit comprising the semiconductor device according to  claim 2 . 
     
     
         15 . An integrated circuit comprising the semiconductor device according to  claim 3 . 
     
     
         16 . An integrated circuit comprising the semiconductor device according to  claim 4 . 
     
     
         17 . An integrated circuit comprising the semiconductor device according to  claim 5 . 
     
     
         18 . An integrated circuit comprising the semiconductor device according to  claim 6 .