Image sensors with light channeling reflective layers therein

Abstract

An image sensor includes a two-dimensional array of image sensor pixels, which are formed in a semiconductor layer. Each image sensor pixel is formed in a substrate having a corresponding semiconductor region therein. Each semiconductor region contains at least first and second photoelectric conversion elements, which are disposed at side-by-side locations therein. An electrically insulating isolation region is also provided, which extends at least partially through the semiconductor region and at least partially between the first and second photoelectric conversion elements, which may be configured respectively as first and second semiconductor regions of first conductivity type (e.g., N-type). At least one optically reflective region is also provided, which extends at least partially through the semiconductor region and surrounds at least a portion of at least one of the first and second photoelectric conversion elements. A semiconductor floating diffusion (FD) region (e.g., N-type region) is provided within the semiconductor region.

What is claimed is: 
     
         1 . An image sensor comprising:
 a semiconductor substrate including a pixel region, the semiconductor substrate having:
 a first trench penetrating a first surface of the semiconductor substrate; and 
 a second trench penetrating the first surface of the semiconductor substrate and having a bottom surface spaced apart from a second surface of the semiconductor substrate, the second surface of the semiconductor substrate opposite to the first surface of the semiconductor substrate; 
   at least two photoelectric conversion elements that are disposed in the substrate of the unit pixel region, wherein the photoelectric conversion elements including a first doped region and a second doped region between the first and second surfaces of the semiconductor substrate;   a first isolation layer provided in the first trench of the semiconductor substrate and defining the pixel region;
 a second isolation layer provided in the second trench of the semiconductor substrate and disposed between the first and second doped regions; and 
 a micro-lens disposed on the first surface of the semiconductor substrate, 
   wherein the first isolation layer includes a first metal layer and has an airgap in the first metal layer;   wherein the second isolation layer consists of an electrically insulating material that completely fills the second trench,   wherein a width of the micro lens is twice a width between a center of the first isolation layer and a center of the second isolation layer.   
     
     
         2 . The image sensor of  claim 1 , wherein the first isolation layer further includes a first insulating layer between the first metal layer and the semiconductor substrate. 
     
     
         3 . The image sensor of  claim 4 , wherein the second insulating layer includes the same material as the first insulating layer. 
     
     
         4 . The image sensor of  claim 1 , wherein a first width of the first isolation layer at the first surface of the semiconductor substrate is greater than a second width of the second isolation layer at the first surface of the semiconductor substrate. 
     
     
         5 . The image sensor of  claim 1 , wherein the first isolation layer penetrates the semiconductor substrate. 
     
     
         6 . The image sensor of  claim 1 , wherein the second isolation layer comprises at least one of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or a hafnium oxide layer. 
     
     
         7 . The image sensor of  claim 1 , wherein the microlens vertically overlaps with the at least two photoelectric conversion elements. 
     
     
         8 . The image sensor of  claim 1 , further comprising a color filter vertically overlapping with the first doped region and the second doped region when viewed from a plan view. 
     
     
         9 . The image sensor of  claim 1 , wherein the substrate further comprises a floating diffusion region extending between the first doped region and the second doped region. 
     
     
         10 . An image sensor comprising:
 a substrate including pixel regions, the substrate having a first surface and a second surface opposite to each other;   a first doped region and a second doped region in each of the pixel regions of the substrate;   a pixel isolation layer penetrating the first surface of the substrate, the pixel isolation layer disposed between the pixel regions of the substrate;   a doping isolation layer penetrating the first surface of the substrate and spaced apart from a second surface of the substrate, the doping isolation layer disposed between the first doped region and the second doped region; and   a micro-lens disposed on the first surface of the substrate;   wherein the pixel isolation layer includes a first metal layer and has a first airgap in the first metal layer, and   wherein the doping isolation layer consists of an electrically insulating material that completely fills a trench in the first surface of the substrate and has a planarized surface thereon that is coplanar with the first surface of the substrate,   wherein the first doped region and the second doped region are disposed between the adjacent pixel isolation layers,   wherein a width of the microlens is substantially the same with a width between centers of adjacent pixel isolation layers.   
     
     
         11 . The image sensor of  claim 10 , wherein the pixel isolation layer further includes a first insulating layer between the first metal layer and the substrate. 
     
     
         12 . The image sensor of  claim 10 , wherein the electrically insulating material includes metal oxide. 
     
     
         13 . The image sensor of  claim 11 , wherein the first insulating layer includes at least one of silicon oxide, silicon nitride, silicon oxynitride, or metal oxide. 
     
     
         14 . The image sensor of  claim 10 , further comprising:
 a gate pattern on the second surface of the substrate;   a plurality of insulative layers stacked on the second surface of the substrate, at least one insulative layer of the plurality of insulative layers covering the gate pattern; and   metal interconnections between insulative layers.   
     
     
         15 . The image sensor of  claim 10 , wherein each of the first doped region and the second doped region is adjacent to the second surface of the substrate. 
     
     
         16 . The image sensor of  claim 10 , further comprising a color filter array disposed on the first surface of the substrate, the color filter array comprising a plurality of color filters, and wherein one color filter of the plurality of color filters corresponds the doping isolation layer, and at least one doped region of the first doped region and the second doped region. 
     
     
         17 . The image sensor of  claim 10 , further comprising a floating diffusion region disposed in the each of the pixel regions of the substrate and disposed at a side of the first doped region. 
     
     
         18 . The image sensor of  claim 10 , further comprising a backside insulating layer disposed between the micro-lens and the first surface of the substrate, wherein the backside insulating layer includes at least one of silicon oxide, silicon nitride, silicon oxynitride, or metal oxide. 
     
     
         19 . An image sensor comprising:
 a substrate including a pixel region, the substrate having:
 a first trench penetrating a first surface of the substrate; and 
 a second trench penetrating the first surface of the substrate and having a bottom surface spaced apart from a second surface of the substrate, the second surface of the substrate opposite to the first surface of the substrate; 
   an anti-reflection layer disposed on the first surface of the substrate;   a micro-lens disposed on the anti-reflection layer;   a color filter between the anti-reflection layer and the micro-lens;   an interconnection structure on the second surface of the substrate, the interconnection structure including insulative layers and metal interconnections between the insulative layers;
 a gate pattern between the interconnection structure and the second surface of the substrate; 
   a first doped region and a second doped region in the pixel region of the substrate and between the first and second surfaces of the substrate;   a pixel isolation layer provided in the first trench of the substrate and defining the pixel region; and   a doping isolation layer provided in the second trench of the substrate and disposed between the first and second doped regions,   wherein the pixel isolation layer includes a first metal layer and a first airgap in the first metal layer,   wherein the doping isolation layer consists of an electrically insulating material that completely fills the second trench, and has a planarized surface thereon that is coplanar with the first surface of the semiconductor substrate,   wherein a width of the microlens is larger than a sum of widths of the first doped region and the second doped region.   
     
     
         20 . The semiconductor device of  claim 19 ,
 wherein the pixel isolation layer further includes a first insulating layer between the first metal layer and the substrate.