Image sensor and method of fabricating the same
Abstract
An image sensor with improved performance, and a method of fabricating the same are provided. The image sensor includes a sensor array region and a pad region, which is disposed outside the sensor array region, the image sensor comprising a first substrate including a first surface, upon which light is incident, and a second surface, which is opposite to the first surface, a first isolation film in the first substrate at the sensor array region, the first isolation film defining a plurality of unit pixels, a second substrate including a third surface, which faces the second surface of the first substrate, and a fourth surface, which is opposite to the third surface, a wiring structure between the second and third surfaces, the wiring structure including an interlayer insulating film and a wiring in the interlayer insulating film, a pad trench in the pad region, the pad trench exposing the wiring through the first substrate, a bonding terminal in the pad trench, the bonding terminal being connected to the wiring, and a second isolation film in the first substrate at the pad region, the second isolation film being adjacent to the pad trench, wherein widths of each of the first and second isolation films decrease in a direction from the second surface to the first surface.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An image sensor comprising:
a first substrate comprising a first surface and a second surface opposite to the first surface, wherein the first substrate includes a sensor array region, a pad region, and a connection region between the sensor array region and the pad region; a first isolation trench in the first substrate at the sensor array region, the first isolation trench defining a plurality of unit pixels; a second isolation trench in the first substrate at the connection region; a third isolation trench in the first substrate at the pad region; a first film on an inner surface of the first isolation trench, wherein the first film has a top surface and a bottom surface opposite to the top surface of the first film; a second film on an inner surface of the second isolation trench, wherein the second film has a top surface and a bottom surface opposite to the top surface of the second film; and a third film on an inner surface of the third isolation trench, wherein the third film has a top surface and a bottom surface opposite to the top surface of the third film, wherein the top surfaces of the first, second and third films are spaced apart from the second surface, wherein the first isolation trench has a first width in a first direction at the bottom surface of the first film, wherein the second isolation trench has a second width in the first direction at the bottom surface of the second film, wherein the third isolation trench has a third width in the first direction at the bottom surface of the third film, wherein the third width is different from the second width and the second width is different from the first width, wherein the first direction is parallel to the first surface of the first substrate, and wherein the image sensor is configured to receive light at the first surface.
2 . The image sensor of claim 1 , wherein the second width is greater than the first width.
3 . The image sensor of claim 2 , wherein the third with is greater than the first width.
4 . The image sensor of claim 1 , further comprises a first filling film filling the first isolation trench on the first film.
5 . The image sensor of claim 4 , wherein the first filling film includes polysilicon.
6 . The image senor of claim 1 , wherein the first and second isolation trenches penetrate the first substrate, and
wherein the first and second isolation trenches extend from the second surface to the first surface.
7 . The image sensor of claim 1 , further comprising:
a second substrate comprising a third surface facing the second surface, and a fourth surface opposite to the third surface; a plurality of wirings between the second surface and the third surface; a first through via at the connection region; and a second through via spaced apart from the first through via at the connection region, and wherein each of the first through via and second through via is connected to at least a part of the plurality of wirings.
8 . The image sensor of claim 7 , wherein the first through via has a tapered shape.
9 . The image sensor of claim 8 , wherein the second isolation trench extends from the second surface to the first surface.
10 . An image sensor comprising:
a first substrate comprising a first surface and a second surface opposite to the first surface, wherein the first substrate includes a sensor array region, an edge region, a pad region between the sensor array region and the edge region, and a connection region between the sensor array region and the pad region; a first isolation trench in the first substrate at the sensor array region, the first isolation trench defining a plurality of unit pixels; a second isolation trench in the first substrate at the connection region; a third isolation trench in the first substrate at the pad region; a fourth isolation trench in the first substrate at the edge region; a first film on an inner surface of the first isolation trench, wherein the first film has a top surface and a bottom surface opposite to the top surface of the first film; a second film on an inner surface of the second isolation trench, wherein the second film has a top surface and a bottom surface opposite to the top surface of the second film; and a third film on an inner surface of the third isolation trench, wherein the third film has a top surface and a bottom surface opposite to the top surface of the third film; and a fourth film on an inner surface of the fourth isolation trench, wherein the fourth film has a top surface and a bottom surface opposite to the top surface of the fourth film, wherein the top surfaces of the first, second, third film, and fourth films are spaced apart from the second surface, wherein the first isolation trench has a first width in a first direction at the bottom surface of the first film, wherein the second isolation trench has a second width in the first direction at the bottom surface of the second film, wherein the third isolation trench has a third width in the first direction at the bottom surface of the third film, wherein the fourth isolation trench has a fourth width in the first direction at the bottom surface of the fourth film, wherein the third width is greater than the first width and the fourth width, wherein the second width is different from the third width, wherein the first direction is parallel to the first surface of the first substrate, and wherein the image sensor is configured to receive light at the first surface.
11 . The image sensor of claim 10 , wherein the first, second, and third isolation trenches extend from the second surface to the first surface.
12 . The image sensor of claim 11 , wherein the first, second, and third isolation trenches penetrate the first substrate.
13 . The image sensor of claim 12 , wherein the fourth width is different from the first width.
14 . The image sensor of claim 12 , wherein the second width is greater than the first width.
15 . The image sensor of claim 14 , wherein the fourth width is different from the first width.
16 . The image sensor of claim 14 , wherein the first width is between 100 nm to 300 nm.
17 . The image sensor of claim 10 , further comprising a first filling film filling the first isolation trench on the first film.
18 . The image sensor of claim 17 , wherein the first filling film includes polysilicon.
19 . The image sensor of claim 10 , further comprising:
a second substrate comprising a third surface facing the second surface, and a fourth surface opposite to the third surface; a plurality of wirings between the second surface and the third surface; a first through via at the connection region; and a second through via spaced apart from the first through via at the connection region, and wherein each of the first through via and second through via is connected to at least a part of the plurality of wirings.Join the waitlist — get patent alerts
Track US2023420477A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.