US2023420232A1PendingUtilityA1

Integrated method and tool for high quality selective silicon nitride deposition

Assignee: APPLIED MATERIALS INCPriority: May 12, 2022Filed: Sep 7, 2023Published: Dec 28, 2023
Est. expiryMay 12, 2042(~15.8 yrs left)· nominal 20-yr term from priority
H10P 72/0454H10P 14/69433H10P 14/6532H10P 72/0468H10P 72/0466H10P 72/0461H10P 72/0434H10P 14/61H10P 14/6522H10P 14/6504H10P 14/6339H10P 14/6336H10P 14/6689H10P 14/6682H10D 64/037H01J 37/32899C23C 16/342C23C 16/38C23C 16/345H01L 21/67167C23C 16/36H01L 21/0234C23C 16/0227C23C 16/56H01L 21/0217H01J 2237/20278H01J 2237/336H01J 2237/335H01J 37/32816H01J 2237/332H10B 41/27H10B 43/27C23C 16/045C23C 16/04
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Claims

Abstract

Methods of manufacturing memory devices are provided. The method comprises pre-cleaning a top surface of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having one or more of a memory hole and a slit pattern opening extending through the film stack; exposing the top surface of the film stack to a growth inhibitor; selectively depositing a silicon-containing dielectric layer in a region of the film stack; and densifying the silicon-containing dielectric layer. The processing method is performed in a processing tool without breaking vacuum.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A processing method to form a logic or memory device, the processing method comprising:
 pre-cleaning a top surface of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having one or more of a memory hole and a slit pattern opening extending through the film stack;   exposing the top surface of the film stack to a growth inhibitor;   selectively depositing a silicon-containing dielectric layer in a region of the film stack; and   densifying the silicon-containing dielectric layer,   wherein the processing method is performed in a processing tool without breaking vacuum.   
     
     
         2 . The processing method of  claim 1 , wherein the second material layer comprises an oxide layer. 
     
     
         3 . The processing method of  claim 1 , wherein the region is a recessed region formed by recessing the first material layer relative to the second material layer through the memory hole. 
     
     
         4 . The processing method of  claim 1 , wherein the region is on a word line side of the film stack. 
     
     
         5 . The processing method of  claim 1 , wherein the first material layer comprises one or more of polysilicon, silicon nitride, silicon carbide, silicon carbonitride, germanium, and titanium nitride. 
     
     
         6 . The processing method of  claim 1 , further comprising oxidizing the silicon-containing dielectric layer. 
     
     
         7 . The processing method of  claim 1 , wherein the processing tool is selected from the group consisting of a single processing chamber and a batch processing chamber. 
     
     
         8 . The processing method of  claim 1 , further comprising:
 exposing the densified silicon-containing dielectric layer to a growth inhibitor;   selectively depositing a second silicon-containing dielectric layer in a region of the film stack; and   densifying the second silicon-containing dielectric layer.   
     
     
         9 . The processing method of  claim 1 , further comprising:
 selectively depositing a second silicon-containing dielectric layer in a region of the film stack; and   densifying the second silicon-containing dielectric layer.   
     
     
         10 . The processing method of  claim 1 , further comprising repeating the method. 
     
     
         11 . A processing method to form a logic or memory device, the processing method comprising:
 pre-cleaning a top surface of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having one or more of a memory hole and a slit pattern opening extending through the film stack;   selectively depositing a silicon-containing dielectric layer in a region of the film stack; and   densifying the silicon-containing dielectric layer,   wherein the processing method is performed in a processing tool without breaking vacuum.   
     
     
         12 . The processing method of  claim 11 , further comprising:
 pre-cleaning a top surface of the densified silicon-containing dielectric layer;   selectively depositing a second silicon-containing layer dielectric layer in a region of the film stack; and   densifying the second silicon-containing dielectric layer.   
     
     
         13 . The processing method of  claim 11 , further comprising:
 selectively depositing a second silicon-containing dielectric layer in a region of the film stack; and   densifying the second silicon-containing dielectric layer.   
     
     
         14 . A processing method to form a logic or memory device, the processing method comprising:
 pre-cleaning a top surface of a film stack, the film stack comprising alternating layers of a first material layer and a second material layer and having one or more of a memory hole and a slit pattern opening extending through the film stack;   exposing the top surface of the film stack to a growth inhibitor;   selectively depositing a silicon-containing dielectric layer in a region of the film stack;   densifying the silicon-containing dielectric layer; and   optionally, repeating one or more of pre-cleaning the top surface of the film stack, exposing the top surface of the film stack to a growth inhibitor, selectively depositing a silicon-containing dielectric layer, and densifying the silicon-containing dielectric layer,   wherein the processing method is performed in a processing tool without breaking vacuum.

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