Doherty amplifier
Abstract
A Doherty amplifier according to the present disclosure includes an input terminal, an output terminal, a carrier amplifier connected between the input terminal and the output terminal, a peak amplifier connected in parallel to the carrier amplifier between the input terminal and the output terminal, a first input matching circuit connected between the input terminal and the carrier amplifier and a second input matching circuit connected between the input terminal and the peak amplifier, wherein the carrier amplifier and the peak amplifier output signals toward outside in directions opposite to each other.
Claims
exact text as granted — not AI-modified1 . A Doherty amplifier comprising:
an input terminal; an output terminal; a carrier amplifier connected between the input terminal and the output terminal; a peak amplifier connected in parallel to the carrier amplifier between the input terminal and the output terminal; a first input matching circuit connected between the input terminal and the carrier amplifier; and a second input matching circuit connected between the input terminal and the peak amplifier, wherein an output of the carrier amplifier and an output of the peak amplifier face outside and in directions opposite to each other, and the output of the carrier amplifier and the output of the peak amplifier are connected to the output terminal without passing through other amplifiers.
2 . The Doherty amplifier according to claim 1 , wherein the carrier amplifier and the peak amplifier are arranged in a direction in which the carrier amplifier outputs a signal.
3 . The Doherty amplifier according to claim 1 , wherein the first input matching circuit and the second input matching circuit are arranged between the carrier amplifier and the peak amplifier.
4 . The Doherty amplifier according to claim 1 ,
wherein a central line of the carrier amplifier matches a central line of the first input matching circuit, and a central line of the peak amplifier matches a central line of the second input matching circuit.
5 . The Doherty amplifier according to claim 1 , comprising:
an output-side λ/4 electrical length line connected between one of the carrier amplifier and the peak amplifier, and the output terminal; and an input-side λ/4 electrical length line connected between the input terminal and one of the first input matching circuit and the second input matching circuit to which the output-side λ/4 electrical length line is not connected on an output side, wherein the output-side λ/4 electrical length line is provided outside a region between the carrier amplifier and the peak amplifier.
6 . The Doherty amplifier according to claim 1 , wherein the first input matching circuit and the second input matching circuit are formed in one chip.
7 . The Doherty amplifier according to claim 6 , wherein the first input matching circuit and the second input matching circuit are formed in one integrated passive device.
8 . The Doherty amplifier according to claim 1 , comprising:
a first anterior stage amplifier connected between the first input matching circuit and the input terminal; and a second anterior stage amplifier connected between the second input matching circuit and the input terminal, wherein the first anterior stage amplifier and the second anterior stage amplifier are formed in one chip.
9 . The Doherty amplifier according to claim 1 , comprising:
a first anterior stage amplifier connected between the first input matching circuit and the input terminal; and a second anterior stage amplifier connected between the second input matching circuit and the input terminal, wherein the carrier amplifier and the first anterior stage amplifier are formed in one chip, and the peak amplifier and the second anterior stage amplifier are formed in one chip.
10 . The Doherty amplifier according to claim 1 , comprising:
a first anterior stage amplifier connected between the first input matching circuit and the input terminal; and a second anterior stage amplifier connected between the second input matching circuit and the input terminal, wherein the carrier amplifier and the second anterior stage amplifier are formed in one chip, and the peak amplifier and the first anterior stage amplifier are formed in one chip.Join the waitlist — get patent alerts
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