US2023402399A1PendingUtilityA1

Semiconductor device and method for making the same

Assignee: STATS CHIPPAC PTE LTDPriority: Oct 29, 2021Filed: Jun 6, 2023Published: Dec 14, 2023
Est. expiryOct 29, 2041(~15.3 yrs left)· nominal 20-yr term from priority
H10W 42/276H10W 44/248H10W 90/00H10W 72/072H10W 72/20H10W 90/701H10W 74/114H10W 74/01H10W 42/20H10W 40/10H10W 44/20H10W 70/611H10W 70/685H10W 74/019H10W 74/014H10P 72/7416H10P 72/7428H10P 72/74H10W 72/071H05K 1/0218H10W 90/724H10W 70/093H01L 23/552H01L 23/3121H01L 21/56H01L 23/36H01Q 1/38H01Q 1/2283H05K 3/02H01Q 1/22H01Q 23/00H05K 1/165H05K 2201/10098H05K 1/181H05K 3/284H05K 3/4007H05K 3/3436H01R 12/716H05K 2201/10189
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Claims

Abstract

A semiconductor device comprises a substrate, at least one electronic component mounted on the substrate, an encapsulant formed on the substrate and at least partially encapsulating the at least one electronic component, a shielding layer formed on the encapsulant, a thermal interface layer formed on the shielding layer, and a metal lid formed on the thermal interface layer.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising:
 a substrate;   at least one electronic component mounted on the substrate;   an encapsulant formed on the substrate and at least partially encapsulating the at least one electronic component;   a shielding layer formed on the encapsulant;   a thermal interface layer formed on the shielding layer; and   a metal lid formed on the thermal interface layer.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the shielding layer comprises:
 a wetting sublayer; and   a shielding sublayer formed on the wetting sublayer.   
     
     
         3 . The semiconductor device of  claim 2 , wherein the shielding layer further comprises a protection sublayer formed on the shielding sublayer. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the protection sublayer comprises stainless steel, organic solderability preservative, or nickel. 
     
     
         5 . The semiconductor device of  claim 2 , wherein
 the wetting sublayer comprises stainless steel or titanium; and   the shielding sublayer comprises copper.   
     
     
         6 . The semiconductor device of  claim 1 , wherein the encapsulant is constructed that a top surface of the at least one electronic component is exposed from the encapsulant to be in contact with the shielding layer. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the thermal interface layer comprises a solder paste. 
     
     
         8 . A semiconductor device, comprising:
 a substrate;   at least one electronic component mounted on the substrate;   an encapsulant formed on the substrate and at least partially encapsulating the at least one electronic component;   a thermal interface layer formed on the encapsulant;   a metal lid formed on the thermal interface layer; and   a shielding layer formed on the substrate and covering the metal lid, the thermal interface layer and the encapsulant.   
     
     
         9 . The semiconductor device of  claim 8 , wherein the shielding layer comprises:
 a shielding sublayer; and   a protection sublayer formed on the wetting sublayer.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the shielding layer further comprises a wetting sublayer formed underneath the shielding sublayer. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the wetting sublayer comprises stainless steel or titanium. 
     
     
         12 . The semiconductor device of  claim 9 , wherein
 the shielding sublayer comprises copper; and   the protection sublayer comprises stainless steel, organic solderability preservative, or nickel.   
     
     
         13 . The semiconductor device of  claim 8 , wherein the encapsulant is constructed that a top surface of the at least one electronic component is exposed from the encapsulant to be in contact with the shielding layer. 
     
     
         14 . The semiconductor device of  claim 8 , wherein the thermal interface layer includes a solder paste. 
     
     
         15 . A method for making a semiconductor device, comprising:
 providing a substrate;   mounting at least one electronic component on the substrate;   forming an encapsulant on the substrate and at least partially encapsulating the at least one electronic component;   forming a shielding layer on the encapsulant;   forming a thermal interface layer on the shielding layer; and   forming a metal lid on the thermal interface layer.   
     
     
         16 . The method of  claim 15 , wherein the shielding layer comprises:
 a wetting sublayer; and   a shielding sublayer formed on the wetting sublayer.   
     
     
         17 . The method of  claim 16 , wherein the shielding layer further comprises a protection sublayer formed on the shielding sublayer. 
     
     
         18 . The method of  claim 15 , wherein the encapsulant is constructed that a top surface of the at least one electronic component is exposed from the encapsulant to be in contact with the shielding layer. 
     
     
         19 . The method of  claim 15 , wherein the encapsulant is constructed to cover a top surface and lateral surfaces of the at least one electronic component. 
     
     
         20 . A method for making a semiconductor device, comprising:
 providing a substrate;   mounting at least one electronic component on the substrate;   forming an encapsulant on the substrate and at least partially encapsulating the at least one electronic component;   forming a thermal interface layer on the encapsulant;   forming a metal lid on the thermal interface layer; and   forming a shielding layer on the substrate and covering the metal lid, the thermal interface layer and the encapsulant.

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