US2023397506A1PendingUtilityA1

Spurious junction prevention via in-situ ion milling

Assignee: IBMPriority: Jun 22, 2020Filed: Aug 22, 2023Published: Dec 7, 2023
Est. expiryJun 22, 2040(~13.9 yrs left)· nominal 20-yr term from priority
H10N 60/0912H10N 60/12H10N 60/805
71
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Claims

Abstract

Systems and techniques that facilitate spurious junction prevention via in-situ ion milling are provided. In various embodiments, a method can comprise forming a tunnel barrier of a Josephson junction on a substrate during a shadow evaporation process. In various instances, the method can further comprise etching an exposed portion of the tunnel barrier during the shadow evaporation process. In various embodiments, the shadow evaporation process can comprise patterning a resist stack onto the substrate. In various instances, the etching the exposed portion of the tunnel barrier can leave a protected portion of the tunnel barrier within a shadow of the resist stack. In various instances, the shadow of the resist stack can be based on a direction of the etching the exposed portion of the tunnel barrier. In various embodiments, the shadow evaporation process can further comprise depositing a first superconducting material on the substrate after the patterning the resist stack, oxidizing a surface of the first superconducting material to form the tunnel barrier, and depositing a second superconducting material over the protected portion of the tunnel barrier to form a Josephson junction. In various instances, the etching the exposed portion of the tunnel barrier can occur after the oxidizing the surface of the first superconducting material and before the depositing the second superconducting material.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method, comprising:
 forming a tunnel barrier of a Josephson junction on a substrate during a shadow evaporation process; and   etching an exposed portion of the tunnel barrier during the shadow evaporation process.   
     
     
         2 . The method of  claim 1 , wherein the shadow evaporation process comprises:
 patterning a resist stack onto the substrate, wherein the etching the exposed portion of the tunnel barrier leaves a protected portion of the tunnel barrier within a shadow of the resist stack.   
     
     
         3 . The method of  claim 2 , wherein the resist stack includes a suspended resist bridge, and wherein the protected portion of the tunnel barrier is beneath the suspended resist bridge. 
     
     
         4 . The method of  claim 2 , wherein the shadow evaporation process further comprises:
 depositing a first superconducting material on the substrate after the patterning the resist stack;   oxidizing a surface of the first superconducting material to form the tunnel barrier; and   depositing a second superconducting material over the protected portion of the tunnel barrier to form the Josephson junction, wherein the etching the exposed portion of the tunnel barrier occurs after the oxidizing the surface of the first superconducting material and before the depositing the second superconducting material.   
     
     
         5 . The method of  claim 1 , wherein the etching the exposed portion of the tunnel barrier employs ion milling. 
     
     
         6 . The method of  claim 5 , wherein a duration of the oxidizing the surface of the first superconducting material is based on a duration of the ion milling. 
     
     
         7 . The method of  claim 5 , wherein the shadow evaporation process is a Dolan double angle evaporation technique, and wherein the ion milling is performed in a top-down direction. 
     
     
         8 . The method of  claim 5 , wherein the shadow evaporation process is a Manhattan double angle evaporation technique, and wherein the ion milling is performed at a glancing angle. 
     
     
         9 . A method, comprising:
 patterning a bi-layer resist stack on a substrate;   forming a junction barrier layer on a first superconductor on the substrate during a shadow evaporation technique; and   directionally etching a first portion of the junction barrier layer during the shadow evaporation technique, the first portion being outside of a shadow cast by the bi-layer resist stack.   
     
     
         10 . The method of  claim 9 , wherein the directionally etching the first portion of the junction barrier layer causes a second portion of the junction barrier layer to remain on the first superconductor, the second portion being inside the shadow cast by the bi-layer resist stack. 
     
     
         11 . The method of  claim 10 , wherein the bi-layer resist stack includes a bridge, and wherein the second portion of the junction barrier layer lies beneath the bridge. 
     
     
         12 . The method of  claim 10 , wherein the shadow evaporation technique comprises:
 evaporating the first superconductor onto the substrate;   oxidizing a surface of the first superconductor to form the junction barrier layer; and   evaporating a second superconductor over the second portion of the junction barrier layer, wherein the directionally etching the first portion of the junction barrier layer occurs after the oxidizing the surface of the first superconductor and before the evaporating the second superconductor.   
     
     
         13 . The method of  claim 9 , wherein the directionally etching the first portion of the junction barrier layer employs ion milling. 
     
     
         14 . The method of  claim 13 , wherein a duration of the oxidizing the surface of the first superconductor is based on a duration of the ion milling. 
     
     
         15 . The method of  claim 13 , wherein the shadow evaporation technique is a Dolan double evaporation technique, and wherein the ion milling is performed in a top-down direction. 
     
     
         16 . The method of  claim 13 , wherein the shadow evaporation technique is a Manhattan double evaporation technique, and wherein the ion milling is performed at a glancing angle. 
     
     
         17 . A device, comprising:
 a first superconducting layer on a substrate, the first superconducting layer having a first portion and a second portion;   a tunnel barrier layer on the first portion of the first superconducting layer; and   a second superconducting layer having a third portion on the tunnel barrier layer and having a fourth portion on the second portion of the first superconducting layer.   
     
     
         18 . The device of  claim 17 , wherein the second portion of the first superconducting layer and the fourth portion of the second superconducting layer are in ohmic contact. 
     
     
         19 . The device of  claim 18 , wherein the first portion of the first superconducting layer, the tunnel barrier layer, and the third portion of the second superconducting layer form a primary Josephson junction. 
     
     
         20 . The device of  claim 19 , wherein the third portion of the second superconducting layer and the fourth portion of the second superconducting layer are discontinuous.

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