Structure and method for mram devices

Abstract

A method of forming a semiconductor device includes providing a bottom electrode; a magnetic tunneling junction (MTJ) element over the bottom electrode; a top electrode over the MTJ element; and a sidewall spacer abutting the MTJ element, wherein at least one of the bottom electrode, the top electrode, and the sidewall spacer includes a magnetic material.

What is claimed is: 
     
         1 . A method, comprising:
 forming a first via hole in a first dielectric layer;   forming a first barrier layer in the first via hole;   forming a first conductive layer over the first barrier layer and in the first via hole;   depositing a magnetic tunnel junction (MTJ) stack over the first conductive layer, the first barrier layer, and the first dielectric layer, wherein the MTJ stack is electrically connected to the first conductive layer;   patterning the MTJ stack, resulting in a patterned MTJ stack;   depositing a nitride spacer over sidewalls of the patterned MTJ stack;   depositing a protective spacer over the nitride spacer;   depositing an oxide spacer over the protective spacer;   depositing a second dielectric layer over the oxide spacer and the patterned MTJ stack;   forming a second via hole in the second dielectric layer;   forming a second barrier layer in the second via hole; and   forming a second conductive layer over the second barrier layer and in the second via hole, wherein the second conductive layer is electrically connected to the patterned MTJ stack, wherein at least one of the first barrier layer, the first conductive layer, the protective spacer, the second barrier layer, and the second conductive layer includes a magnetic material.   
     
     
         2 . The method of  claim 1 , wherein the magnetic material includes Co. 
     
     
         3 . The method of  claim 1 , further comprising:
 before the patterning of the MTJ stack, depositing a hard mask layer having TiN over the MTJ stack, wherein the forming of the second via hole includes removing a portion of the hard mask layer exposed in the second via hole, thereby exposing a top surface of the MTJ stack.   
     
     
         4 . The method of  claim 1 , wherein prior to depositing the second dielectric layer over the oxide spacer and the patterned MTJ stack forming a metal via and a metal line in a logic region of a substrate, wherein the patterned MTJ stack is disposed in a memory region of the substrate. 
     
     
         5 . The method of  claim 4 , wherein the depositing the second dielectric layer includes depositing the second dielectric layer over the metal via and the metal line in the logic region. 
     
     
         6 . The method of  claim 5 , further comprising:
 forming a third via hole in the second dielectric layer in the logic region;   forming the second barrier layer in the third via hole; and   forming the second conductive layer over the second barrier layer in the third via hole.   
     
     
         7 . The method of  claim 1 , wherein the patterning the MTJ stack, resulting in the patterned MTJ stack includes patterning a hard mask layer disposed on the MTJ stack. 
     
     
         8 . The method of  claim 7 , wherein the depositing the protective spacer includes depositing the protective spacer over a sidewall of the hard mask layer. 
     
     
         9 . A method, comprising:
 forming a bottom electrode over a substrate, wherein the forming the bottom electrode includes:
 depositing a first barrier layer in a first via hole; and 
 depositing a first conductive layer over the first barrier layer and in the first via hole; 
   forming a magnetic tunnel junction (MTJ) stack over the first conductive layer;   depositing a protective spacer over sidewalls of the MTJ stack;   forming an upper electrode over the MTJ stack, wherein the forming the upper electrode includes:
 depositing a second barrier layer in a second via hole; and 
 forming a second conductive layer over the second barrier layer and in the second via hole, wherein at least one of the first barrier layer, the first conductive layer, the protective spacer, the second barrier layer, or the second conductive layer includes a magnetic material. 
   
     
     
         10 . The method of  claim 9 , further comprising:
 forming a dielectric spacer on the sidewalls of the MTJ stack prior to depositing the protective spacer.   
     
     
         11 . The method of  claim 10 , further comprising:
 forming another dielectric spacer over the protective spacer.   
     
     
         12 . The method of  claim 10 , further comprising:
 forming the second via hole, wherein the second via hole includes an edge defined by the protective spacer.   
     
     
         13 . The method of  claim 9 , wherein the depositing the second barrier layer includes depositing the second barrier layer in a third via hole in a logic region of the substrate. 
     
     
         14 . The method of  claim 9 , further comprising:
 forming the second via hole extending from the MTJ stack to another MTJ stack.   
     
     
         15 . The method of  claim 9 , wherein depositing the second barrier layer in the second via hole includes providing a first portion of the second barrier layer under the second conductive layer and a second portion of the second barrier layer over a portion of the second conductive layer. 
     
     
         16 . A method of semiconductor device fabrication, the method comprising:
 forming a magnetic tunneling junction (MTJ) element over a substrate;   forming a sidewall spacer abutting the MTJ element; and   forming at least one electrode contacting the MTJ element, wherein the forming the at least one electrode includes depositing at least one way of magnetic material.   
     
     
         17 . The method of  claim 16 , the forming the at least one electrode includes depositing a barrier layer of the magnetic material including at least one of cobalt, iron, or nickel. 
     
     
         18 . The method of  claim 16 , wherein the forming the sidewall spacer includes depositing a protection layer of magnetic material. 
     
     
         19 . The method of  claim 16 , wherein the forming the at least one electrode includes forming an upper electrode and a bottom electrode each comprising magnetic material. 
     
     
         20 . The method of  claim 16 , wherein the depositing the magnetic material deposits the magnetic material directly on the MTJ element.