US2023387313A1PendingUtilityA1

Transistor including hydrogen diffusion barrier film and methods of forming same

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jun 23, 2020Filed: Aug 7, 2023Published: Nov 30, 2023
Est. expiryJun 23, 2040(~13.9 yrs left)· nominal 20-yr term from priority
H10P 95/94H10D 30/0316H10D 30/6704H10D 84/013H10D 30/6732H10D 88/00H10D 30/6755H10B 63/30H10B 61/22H10B 51/40H10D 30/6758H10D 30/031H10D 30/6729H10D 64/258H10D 64/01H10D 30/6757H10D 30/673H10D 99/00H10D 30/6713H01L 29/78618H01L 29/7869H01L 29/66742H01L 29/401H01L 29/42384H01L 29/41775H01L 29/78642H01L 29/78696H01L 29/41733H10B 51/30H10B 63/34H10B 63/80H10B 61/20H10B 53/10H10B 53/40H10B 51/10
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Claims

Abstract

A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of forming a transistor, comprising:
 depositing a first dielectric layer on a substrate;   forming a semiconductor layer on the first dielectric layer;   forming a hydrogen diffusion barrier film on a channel region of the semiconductor layer;   depositing a second dielectric layer on the semiconductor layer and the hydrogen diffusion barrier film; and   performing a thermal annealing process to diffuse hydrogen into the semiconductor layer to form a source region and a drain region on opposing sides of the channel region.   
     
     
         2 . The method of  claim 1 , wherein the performing the thermal annealing process comprises heating the substrate at a temperature ranging from about 100° C. to about 300° C., in a hydrogen (H 2 ) containing atmosphere. 
     
     
         3 . The method of  claim 1 , further comprising:
 forming a word line and source and drain electrodes in different ones of the first and second dielectric layers; and   forming a gate dielectric layer between the word line and the channel region.   
     
     
         4 . The method of  claim 1 , further comprising:
 forming a trench in the first dielectric layer;   forming a word line in the trench; and   forming a gate dielectric layer between the word line and the semiconductor layer.   
     
     
         5 . The method of  claim 4 , further comprising:
 forming first and second via cavities in the second dielectric layer, the first via cavity exposing the source region and the second via cavity exposing the drain region; and   forming a source electrode in the first via cavity and a drain electrode in the second via cavity.   
     
     
         6 . The method of  claim 5 , wherein:
 the first and second via cavities expose opposing sides of the hydrogen diffusion barrier film; and   the source and drain electrodes respectively contact the opposing sides of the hydrogen diffusion barrier film and vertically overlap opposing portions of the word line.   
     
     
         7 . The method of  claim 5 , wherein the source and drain electrodes are laterally spaced apart from the hydrogen diffusion barrier film and do not vertically overlap the word line. 
     
     
         8 . The method of  claim 1 , wherein the hydrogen diffusion barrier film comprises a dielectric material and has a thickness ranging from about 1 nm to about 200 nm. 
     
     
         9 . The method of  claim 8 , wherein the hydrogen diffusion barrier film comprises Al 2 O 3 . 
     
     
         10 . The method of  claim 1 , wherein:
 the first dielectric layer comprises silicon dioxide;   the second dielectric layer comprises silicon dioxide or silicon nitride; and   the semiconductor layer comprises a metal oxide semiconductor material.   
     
     
         11 . A method of forming a transistor, comprising:
 depositing a first dielectric layer on a substrate;   forming source and drain electrodes in the first dielectric layer;   forming a semiconductor layer on the first dielectric layer and the source and drain electrodes;   forming a hydrogen diffusion barrier film on a channel region of the semiconductor layer;   depositing a second dielectric layer on the semiconductor layer and the hydrogen diffusion barrier film; and   performing a thermal annealing process to diffuse hydrogen into the semiconductor layer to form a source region and a drain region on opposing sides of the channel region.   
     
     
         12 . The method of  claim 11 , wherein the performing the thermal annealing process comprises heating the substrate at a temperature ranging from about 100° C. to about 300° C., in a hydrogen (H 2 ) containing atmosphere. 
     
     
         13 . The method of  claim 11 , further comprising:
 forming a gate dielectric layer on the hydrogen diffusion barrier film; and   forming a word line on the gate dielectric layer   
     
     
         14 . The method of  claim 13 , wherein the gate dielectric layer and the word line are formed prior to performing the thermal annealing process. 
     
     
         15 . The method of  claim 11 , wherein the hydrogen diffusion barrier film comprises a dielectric material and has a thickness ranging from about 1 nm to about 200 nm. 
     
     
         16 . The method of  claim 15 , wherein the hydrogen diffusion barrier film comprises Al 2 O 3 . 
     
     
         17 . The method of  claim 11 , wherein:
 the first dielectric layer comprises silicon dioxide;   the second dielectric layer comprises silicon dioxide or silicon nitride; and   the semiconductor layer comprises a metal oxide semiconductor material.   
     
     
         18 . A method of forming a transistor, comprising:
 depositing a first dielectric layer on a substrate;   forming a semiconductor layer on the first dielectric layer;   forming a hydrogen diffusion barrier film on a channel region of the semiconductor layer;   depositing a second dielectric layer on the semiconductor layer and the hydrogen diffusion barrier film; and   heating the substrate at a temperature ranging from about 100° C. to about 300° C., in a hydrogen (H 2 ) containing atmosphere to form a source region and a drain region on opposing sides of the channel region.   
     
     
         19 . The method of  claim 18 , further comprising:
 forming a word line and source and drain electrodes in different ones of the first and second dielectric layers; and   forming a gate dielectric layer between the word line and the channel region.   
     
     
         20 . The method of  claim 18 , wherein:
 the hydrogen diffusion barrier film comprises a dielectric material and has a thickness ranging from about 1 nm to about 200 nm;   the first dielectric layer comprises silicon dioxide;   the second dielectric layer comprises silicon dioxide or silicon nitride; and   the semiconductor layer comprises a metal oxide semiconductor material.

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