US2023387213A1PendingUtilityA1

Silicon-germanium fins and methods of processing the same in field-effect transistors

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Feb 19, 2020Filed: Aug 9, 2023Published: Nov 30, 2023
Est. expiryFeb 19, 2040(~13.6 yrs left)· nominal 20-yr term from priority
H10D 84/853H10D 84/0193H10D 84/038H10D 30/62H10D 30/024H10D 30/6212H10D 30/0245H10D 84/0158H10D 84/0128H10D 64/512H10D 64/01H10D 62/151H10D 62/235H10D 84/0144H10D 84/0135H10D 84/013H10D 62/83H10D 84/0151H10D 84/834H01L 29/16H01L 29/66795H01L 21/823821H01L 27/0924H01L 29/785
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Claims

Abstract

A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method comprising:
 providing a silicon-containing fin structure and a germanium-containing fin structure on a substrate;   trimming, via a first process, the silicon-containing fin structure;   trimming, via a second process, the germanium-containing fin structure;   forming a silicon-containing layer directly on the trimmed silicon-containing fin structure and the trimmed germanium-containing fin structure;   forming an interfacial layer directly on the silicon-containing layer,   forming a gate dielectric layer directly on the interfacial layer, and   forming a gate electrode layer on the gate dielectric layer.   
     
     
         2 . The method of  claim 1 , wherein the silicon-containing fin structure has a different material composition than the germanium-containing fin structure. 
     
     
         3 . The method of  claim 1 , wherein the trimmed silicon-containing fin structure includes a first upper portion and a first lower portion, wherein the first upper portion has a first edge and an opposing second edge and the first lower portion has a third edge and an opposing fourth edge, wherein the trimmed silicon-containing fin structure further includes a first transition edge tapering away from the first edge to the third edge, the first edge and the third edge being on the same side of the trimmed silicon-containing fin structure, wherein the trimmed silicon-containing fin structure further includes a second transition edge tapering away from the second edge to the fourth edge, the second edge and the fourth edge being on the same side of the trimmed silicon-containing fin structure, and wherein the first transition edge extends to a greater height above the substrate than the second transition edge, and
 wherein the trimmed germanium-containing fin structure includes a second upper portion and a second lower portion, wherein the second upper portion has a fifth edge and an opposing sixth edge and the second lower portion has a seventh edge and an opposing eighth edge, wherein the trimmed germanium-containing fin structure further includes a third transition edge tapering away from the fifth edge to the seventh edge, the fifth edge and the seventh edge being on the same side of the trimmed germanium-containing fin structure, wherein the trimmed germanium-containing fin structure further includes a fourth transition edge tapering away from the sixth edge to the eighth edge, the sixth edge and the eighth edge being on the same side of the trimmed germanium-containing fin structure, and wherein the third transition edge extends to a greater height above the substrate than the fourth transition edge.   
     
     
         4 . The method of  claim 1 , further comprising:
 recessing a portion of the trimmed silicon-containing fin structure and a portion of the trimmed germanium-containing fin structure;   forming a first source/drain feature on the portion of the recessed trimmed silicon-containing fin structure; and   forming a second source/drain feature on the portion of the recessed trimmed germanium-containing fin structure.   
     
     
         5 . The method of  claim 4 , wherein the first source/drain feature includes a first dopant having a first type of conductivity and the second source/drain feature includes a second dopant having a second type of conductivity that is opposite the first type of conductivity. 
     
     
         6 . The method of  claim 1 , further comprising:
 forming a dielectric isolation structure on the substrate between the silicon-containing fin structure and the germanium-containing fin structure; and   forming a liner layer directly on the silicon-containing fin structure, the dielectric isolation structure and the germanium-containing fin structure such that the liner layer extends continuously from the silicon-containing fin structure to the germanium-containing fin structure.   
     
     
         7 . The method of  claim 6 , wherein the liner layer interfaces with the silicon-containing layer disposed directly on the trimmed silicon-containing fin structure and the trimmed germanium-containing fin structure. 
     
     
         8 . The method of  claim 1 , wherein an upper portion of the trimmed silicon-containing fin structure has a first width and an upper portion of the trimmed germanium-containing fin structure has a second width that is different than the first width. 
     
     
         9 . A method comprising:
 forming a germanium-containing fin structure on a substrate;   modifying the germanium-containing fin structure such that the modified trimmed germanium-containing fin structure includes:
 an upper portion having a first edge and an opposing second edge; 
 a lower portion having a third edge and an opposing fourth edge; 
 a first transition edge tapering away from the first edge to the third edge, the first edge and the third edge being on the same side of the modified germanium-containing fin structure; and 
 a second transition edge tapering away from the second edge to the fourth edge, the second edge and the fourth edge being on the same side of the modified germanium-containing fin structure, and wherein the second transition edge extends to a greater height above the substrate than the first transition edge; 
   forming a silicon-containing layer directly on the modified germanium-containing fin structure;   forming an interfacial layer directly on the silicon-containing layer, and   forming a first gate electrode layer on the interfacial layer.   
     
     
         10 . The method of  claim 9 , wherein the forming of the silicon-containing layer directly on the modified germanium-containing fin structure includes forming the silicon-containing layer directly on at least portions of the first edge, the second edge, the first transition edge and the second transition edge. 
     
     
         11 . The method of  claim 9 , further comprising:
 forming a silicon-containing fin structure on the substrate; and   modifying the silicon-containing fin structure, and   wherein the forming of the silicon-containing layer directly on the modified germanium-containing fin structure includes forming the silicon-containing layer directly on the modified silicon-containing fin structure.   
     
     
         12 . The method of  claim 11 , wherein the silicon-containing layer extends continuously from the modified germanium-containing fin structure to the modified silicon-containing fin structure after the forming of the silicon-containing layer directly on the modified germanium-containing fin structure and the modified silicon-containing fin structure. 
     
     
         13 . The method of  claim 9 , further comprising forming a liner layer on the germanium-containing fin structure, and
 wherein the silicon-containing layer interfaces with the liner layer after the forming of the silicon-containing layer directly on the modified germanium-containing fin structure.   
     
     
         14 . The method of  claim 9 , further comprising:
 removing the first gate electrode layer to expose the interfacial layer;   forming a gate dielectric layer on the expose interfacial layer; and   forming a second gate electrode layer on the gate dielectric layer.   
     
     
         15 . A method, comprising:
 forming a semiconductor substrate having a first region and a second region;   forming a first fin protruding from the first region and a second fin protruding from the second region, wherein the first fin includes silicon-germanium (SiGe) and the second fin includes silicon (Si) but is free of germanium (Ge);   determining a thickness of a Si-containing layer to be deposited over the first fin;   trimming the first fin based on the thickness of the Si-containing layer, wherein trimming the first fin forms a fin shoulder that protrudes from a sidewall of the trimmed first fin;   depositing the Si-containing layer to the determined thickness over the trimmed first fin, wherein a portion of the Si-containing layer laterally extends beyond the fin shoulder;   forming a dummy gate stack over a portion of the Si-containing layer,   forming source/drain (S/D) features adjacent to the dummy gate stack in the first fin and the second fin; and   replacing the dummy gate stack with a metal gate stack.   
     
     
         16 . The method of  claim 15 , further comprising, before depositing the Si-containing layer:
 measuring a first width of the first fin;   determining a first dimension based on the first width and the thickness of the Si-containing layer;   comparing the first dimension with a first target dimension of the first fin; and   trimming the first fin based on result of the comparing, wherein trimming the first fin is configured to remove portions of the first fin without substantially removing portions of the second fin.   
     
     
         17 . The method of  claim 16 , wherein trimming the first fin includes:
 oxidizing SiGe in the first fin with an etchant; and   removing the oxidized SiGe with the etchant, wherein the etchant includes an oxidant and a metal hydroxide, an amine derivative, or a combination thereof.   
     
     
         18 . The method of  claim 15 , wherein the thickness of the Si-containing layer is a first thickness, and wherein depositing the Si-containing layer forms the Si-containing layer to a second thickness over the second fin, and wherein the second thickness is less than the first thickness. 
     
     
         19 . The method of  claim 18 , further comprising, before depositing the Si-containing layer:
 measuring a second width of the second fin;   determining a second dimension based on the second width and the second thickness of the Si-containing layer;   comparing the second dimension with a second target dimension of the second fin; and   trimming the second fin based on result of the comparing, wherein trimming the second fin is configured to remove portions of the second fin without substantially removing portions of the first fin.   
     
     
         20 . The method of  claim 19 , wherein trimming the second fin includes applying an etchant that includes a metal hydroxide, an amine derivative, or a combination thereof, and wherein the etchant is free of an oxidant.

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