System Formed Through Package-In-Package Formation

Abstract

A package includes a first device die, and a second device die bonded to the first device die through hybrid bonding. The second device die is larger than the first device die. A first isolation region encapsulates the first device die therein. The first device die, the second device die, and the first isolation region form parts of a first package. A third device die is bonded to the first package through hybrid bonding. The third device die is larger than the first package. A second isolation region encapsulates the first package therein. The first package, the third device die, and the second isolation region form parts of a second package.

What is claimed is: 
     
         1 . A package comprising:
 a first device die;   a second device die over and bonding the first device die through both of fusion bonds and metal-to-metal direct bonds;   a first isolation region encapsulating the first device die therein, wherein first edges of the first isolation region are vertically aligned to respective second edges of the second device die;   a third device die under and bonding to the first device die through both of fusion bonds and metal-to-metal direct bonds; and   a second isolation region encapsulating the first device die and the first isolation region therein, wherein third edges of the second isolation region are vertically aligned to respective fourth edges of the third device die.   
     
     
         2 . The package of  claim 1  further comprising a first through-via penetrating through the first isolation region, wherein the first through-via electrically connects the second device die to the third device die. 
     
     
         3 . The package of  claim 2  further comprising a second through-via penetrating through the second isolation region and electrically connected to the third device die, wherein a first top width of the first through-via is smaller than a first bottom width of the first through-via, and a second top width of the second through-via is greater than a second bottom width of the second through-via. 
     
     
         4 . The package of  claim 1 , wherein each of the first isolation region and the second isolation region comprises:
 a dielectric liner contacting the first device die and the second device die, respectively; and   a dielectric region on the dielectric liner.   
     
     
         5 . The package of  claim 1  further comprising:
 a fourth device die over and bonding to the second device die through both of fusion bonds and metal-to-metal direct bonds; and 
 a third isolation region encapsulating the first device die, the second device die, the third device die, the first isolation region, and the second isolation region therein, wherein fifth edges of the fourth device die are vertically aligned to sixth edges of the third isolation region. 
 
     
     
         6 . The package of  claim 5  further comprising:
 a fifth device die under and bonding to the third device die through both of fusion bonds and metal-to-metal direct bonds; and 
 a fourth isolation region encapsulating the first device die, the second device die, the third device die, and the fourth device die therein, wherein seventh edges of the fifth device die are vertically aligned to eighth edges of the fourth isolation region. 
 
     
     
         7 . The package of  claim 5 , wherein the first device die, the second device die, the third device die, and the fourth device die are increasingly wider. 
     
     
         8 . The package of  claim 5 , wherein each of the first isolation region, the second isolation region, and the third isolation region comprises a plurality of through-vias therein. 
     
     
         9 . The package of  claim 1 , wherein each of the first device die, the second device die, the third device die comprises:
 a semiconductor substrate; and   through-substrate vias penetrating through the semiconductor substrate.   
     
     
         10 . The package of  claim 1 , wherein the second isolation region contacts the first isolation region to form a vertical interface, and wherein the vertical interface is vertically aligned to an edge of the second device die. 
     
     
         11 . A package comprising:
 a first device die;   a second device die bonded to a front side of the first device die;   a first gap-filling material encircling the first device die to form a first package along with the first device die and the second device die;   a first through-via penetrating through the first gap-filling material;   a third device die bonded to the first package, wherein the third device die is on a backside of the first device die, and the third device die is electrically connected to the second device die through the first through-via;   a second gap-filling material encircling the first package to form a second package along with the first package and the third device die; and   a second through-via penetrating through the second gap-filling material and electrically connected to the third device die.   
     
     
         12 . The package of  claim 11  further comprising:
 a fourth device die bonded to the second package, wherein the fourth device die is on a backside of the second device die, and the fourth device die is electrically connected to the third device die through the second through-via. 
 
     
     
         13 . The package of  claim 11 , wherein a first dielectric layer in the first device die is physically joined to a second dielectric layer in the second device die, and a first bond pad in the first device die is physically joined to a second bond pad in the second device die. 
     
     
         14 . The package of  claim 11 , wherein the first through-via has a first top end and a first bottom end wider than the first top end, and the second through-via has a second top end and a second bottom end narrower than the second top end. 
     
     
         15 . The package of  claim 14 , wherein the first device die comprises:
 a first semiconductor substrate; and   a third through-via penetrating through the first semiconductor substrate, wherein the third through-via has a third top end and a third bottom end narrower than the third top end.   
     
     
         16 . The package of  claim 15 , wherein the second device die comprises:
 a second semiconductor substrate; and   a fourth through-via penetrating through the second semiconductor substrate, wherein the fourth through-via has a fourth top end and a fourth bottom end wider than the fourth top end.   
     
     
         17 . The package of  claim 11 , wherein a first edge of the first gap-filling material contacts a second edge of the second gap-filling material to form a vertical interface perpendicular to a horizontal interface between the first device die and the second device die, and the vertical interface is flush with a respective edge of the second device die. 
     
     
         18 . A package comprising:
 a first device die comprising:
 a semiconductor substrate; and 
 a through-substrate via penetrating through the semiconductor substrate; 
   a second device die overlying and bonding to the first device die;   a third device die underlying and bonding to the first device die;   a first gap-filling material encircling the first device die, wherein the first gap-filling material is overlapped by the second device die and overlapping the third device die, and a first outer edge of the second device die is vertically aligned to a second outer edge of the first gap-filling material; and   a through-dielectric via penetrating through the first gap-filling material, wherein the through-dielectric via electrically interconnects the second device die and the third device die.   
     
     
         19 . The package of  claim 18  further comprising a second gap-filling material encircling the first device die and the first gap-filling material, wherein:
 the first gap-filling material and the second gap-filling material form a vertical interface that is vertically aligned to the first outer edge of the second device die; and 
 a third outer edge of the second gap-filling material is vertically aligned to a fourth outer edge of the third device die. 
 
     
     
         20 . The package of  claim 18 , wherein the through-substrate via comprises a first top end and a first bottom end narrower than the first top end, and the through-dielectric via comprises a second top end and a second bottom end wider than the second top end.