Semiconductor device including back side power supply circuit

Abstract

A semiconductor device includes a substrate, a main circuit disposed over a front surface of the substrate, and a backside power delivery circuit disposed over a back surface of the substrate. The backside power delivery circuit includes a first main power supply wiring for supplying a first voltage, a second main power supply wiring for supplying a second voltage, a first local power supply wiring, and a first switch coupled to the first main power supply wiring and the first local power supply wiring. The first main power supply wiring, the second main power supply wiring and the first local power supply wiring are embedded in a first back side insulating layer disposed over the back surface of the substrate. The first local power supply wiring is coupled to the main circuit via a first through-silicon via (TSV) passing through the substrate for supplying the first voltage.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, comprising:
 forming a front side circuit at a front side of a main substrate;   attaching a sacrificial substrate with a bonding layer to a back side of the main substrate;   forming through-silicon-vias (TSVs) passing through the main substrate to be connected to the front side circuit;   forming back side power supply wirings including a first back side power supply wiring and a second back side power supply wiring;   forming a first interlayer dielectric (ILD) layer over the back side power supply wirings; and   forming thin film transistors over the first ILD layers to switch power supply between the first back side power supply wiring and the second back side power supply wiring.   
     
     
         2 . The method of  claim 1 , further comprising:
 forming a second ILD layer over the TFTs; and   forming electrodes to be connected to outside and additional wirings.   
     
     
         3 . The method of  claim 1 , wherein the forming the front side circuit comprises forming buried conductive wirings disposed in an isolation insulating layer. 
     
     
         4 . The method of  claim 3 , wherein:
 the front side circuit includes fin field effect transistors (FinFETs), and   the buried conductive wirings are formed between fin structures of the FinFETs.   
     
     
         5 . The method of  claim 3 , wherein one or more of the TSVs are formed to be connected to one or more of the buried conductive wirings. 
     
     
         6 . The method of  claim 5 , wherein one or more of the TSVs are connected to other circuit elements of the front side circuit than the buried conductive wirings. 
     
     
         7 . The method of  claim 1 , further comprising, before forming the TSVs:
 reducing a thickness of the main substrate at the back side of the main substrate;   forming an insulating layer on the back side of the main substrate,   wherein the TSVs pass through the insulating layer.   
     
     
         8 . The method of  claim 1 , wherein the thin film transistors are formed by:
 forming a semiconductor layer over the first ILD layer;   forming gate structures over the semiconductor layer;   forming a second ILD layer over the gate structures;   forming openings in the second ILD layer; and   forming conductive layers in the openings to form source and drain structures.   
     
     
         9 . The method of  claim 1 , wherein the thin film transistors are formed by:
 forming a semiconductor layer over the first ILD layer;   forming gate structures over the semiconductor layer;   forming a second ILD layer over the gate structures;   forming an opening in the second ILD layer, in which the gate structures are exposed;   forming a conductive layer in the opening; and   performing a planarization operation on the conductive layer to form source and drain structures.   
     
     
         10 . A method of manufacturing a semiconductor device, comprising:
 forming a front side circuit at a front side of a main substrate, the front side circuit including fin structures extending in a first direction;   attaching a sacrificial substrate with a bonding layer to a back side of the main substrate;   forming through-silicon-vias (TSVs) passing through the main substrate to be connected to the front side circuit;   forming back side power supply wirings including a pair of first main power supply wirings for supplying a first voltage, and a first local power supply wiring for supplying the first voltage disposed between the pair of first main power supply wirings in plan view, the back side power supply wirings extending in the first direction;   forming a first interlayer dielectric (ILD) layer over the back side power supply wirings; and   forming thin film transistors over the first ILD layers to be coupled to the pair of first main power supply wirings and the first local power supply wiring,   wherein the first local power supply wiring is coupled to the front side circuit via one or more of the TSVs.   
     
     
         11 . The method of  claim 10 , wherein the back side power supply wirings further include a pair of second main power supply wirings for supplying a second voltage different from the first voltage. 
     
     
         12 . The method of  claim 11 , wherein the pair of first main power supply wirings and the first local power supply wiring are disposed between the pair of second main power supply wirings in plan view. 
     
     
         13 . The method of  claim 12 , wherein the pair of second main power supply wirings are coupled to the front side circuit via one or more of the TSVs. 
     
     
         14 . The method of  claim 13 , wherein the TSVs formed to be arranged in a matrix having a first pitch along the first direction and a second pitch along a second direction crossing the first direction. 
     
     
         15 . The method of  claim 14 , wherein the first pitch is in a range from 120 nm to 480 nm. 
     
     
         16 . The method of  claim 15 , wherein the first pitch is equal to the second pitch. 
     
     
         17 . A method of manufacturing a semiconductor device, comprising:
 forming a front side circuit at a front side of a main substrate, the front side circuit including fin structures extending in a first direction and buried conductive lines disposed between the fin structures;   attaching a sacrificial substrate with a bonding layer to a back side of the main substrate;   forming through-silicon-vias (TSVs) passing through the main substrate to be connected to the buried conductive lines;   forming back side power supply wirings including a pair of first main power supply wirings for supplying a first voltage, and a first local power supply wiring for supplying the first voltage disposed between the pair of first main power supply wirings in plan view, the back side power supply wirings extending in the first direction;   forming a first interlayer dielectric (ILD) layer over the back side power supply wirings; and   forming thin film transistors over the first ILD layers to be coupled to the pair of first main power supply wirings and the first local power supply wiring,   wherein the first local power supply wiring is coupled to the front side circuit via one or more of the TSVs.   
     
     
         18 . The method of  claim 17 , wherein the buried conductive lines are formed by:
 after forming the fin structures, forming an isolation insulating layer;   forming trenches between the fin structures; and   forming the buried conductive lines in the trenches.   
     
     
         19 . The method of  claim 18 , wherein the conductive material is formed by:
 filling the trenches with a conductive material;   recessing the filled conductive material; and   forming cap insulating layers over the recessed conductive material.   
     
     
         20 . The method of  claim 18 , wherein before the conductive material is formed, a liner insulating layer is formed on sides and a bottom of the trenches.