A method for manufacturing an electrical device with an anodic porous oxide region delimited by planarizing a stack of materials
Abstract
A method for manufacturing an electrical device that includes: anodizing a portion of an anodizable metal layer so as to obtain an anodic porous oxide region and an anodizable metal region adjoining the anodic porous oxide region, the anodic porous oxide region being thicker than the anodizable metal region; depositing a layer of liner material on the anodic porous oxide region and on the anodizable metal region; depositing a layer of filler material on the layer of liner material to obtain a stacked structure having a top surface; planarizing the stacked structure from a top surface thereof until reaching the layer of the liner material, so as to expose a portion of liner material located above at least a portion of the anodic porous oxide region; and removing the exposed portion of liner material.
Claims
exact text as granted — not AI-modified1 . A method for manufacturing an electrical device, the method comprising:
providing an anodizable metal layer above a substrate; anodizing a portion of the anodizable metal layer so as to obtain an anodic porous oxide region having a top surface and an anodizable metal region adjoining the anodic porous oxide region and also having a top surface, the anodic porous oxide region being thicker than the anodizable metal region so that the top surface of the anodic porous oxide region is higher than the top surface of the anodizable metal region; depositing a layer of liner material on the top surface of the anodic porous oxide region and on the top surface of the anodizable metal region; depositing a layer of filler material on the layer of liner material having a thickness that is greater than the height difference between the top surface of the anodic porous oxide region and the top surface of the anodizable metal region, the filler material being different from the liner material, to obtain a stacked structure having a top surface; planarizing the stacked structure from a top surface thereof until reaching the layer of liner material, so as to expose a portion of the liner material located above at least a portion of the anodic porous oxide region; and removing the exposed portion of the liner material.
2 . The method of claim 1 , further comprising, prior to anodizing the portion of the anodizable metal layer, forming a hard mask on the top surface of the anodizable metal layer having an opening onto a portion of the anodizable metal layer to be anodized; and
removing the hard mask after the anodizing of the portion of the anodizable metal layer.
3 . The method of claim 1 , wherein the liner material has a thickness which is greater than two times an average pore width of pores of the anodic porous oxide.
4 . The method of claim 1 , wherein the removing of the portion of the liner material comprises a selective etching having a high selectivity between the liner material to be etched and the anodic porous oxide.
5 . The method of claim 1 , wherein the planarizing of the stacked structure comprises a using a chemical mechanical polishing configured to stop the planarizing when reaching the layer of the liner material.
6 . The method of claim 1 , further comprising depositing by spin-coating a layer of resist material having a thickness that is greater than a height difference between the top surface of the anodic porous oxide region and the top surface of the anodizable metal region, and wherein the planarizing of the stacked structure comprises a non-selective etching between the resist material and the filler material.
7 . The method of claim 1 , wherein the anodizable metal layer comprises aluminum.
8 . The method of claim 1 , wherein the anodic porous oxide region comprises substantially straight pores extending from the top surface of the anodic porous oxide region and wherein after the removing of the exposed portion of liner material, the pores are open onto the top surface of the portion of the anodic porous oxide region.
9 . The method of claim 8 , further comprising depositing a layered structure inside the pores of the portion of the anodic porous oxide region.
10 . The method of claim 9 , wherein the layered structure comprises a metal-insulator-metal stack so as to form a capacitor having electrodes extending inside the pores of the portion of the anodic porous oxide region.
11 . An electrical device comprising:
a substrate; and above the substrate, a layer comprising an anodizable metal region having a top surface adjoining an anodic porous oxide region also having a top surface, the anodic porous oxide region being thicker than the anodizable metal region so that the top surface of the anodic porous oxide region is higher than the top surface of the anodizable metal region; a stacked structure including a layer of liner material on the top surface of the anodizable metal region and partially above and on the top surface of the anodic porous oxide region so as to delimit an exposed portion of the anodic porous oxide region, and a layer of filler material above and on the layer of the liner material having a thickness that is substantially equal to a height difference between the top surface of the anodic porous oxide region and the top surface of the anodizable metal region, wherein the stacked structure includes an opening onto the exposed portion of the anodic porous oxide region, and the stacked structure is planarized around the opening.
12 . The electrical device of claim 11 , wherein the exposed portion of the anodic porous oxide region is surrounded by a peripheral portion of the anodic porous oxide region comprising pores that are sealed by the layer of the liner material.Join the waitlist — get patent alerts
Track US2023386751A2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.