Semiconductor device having multiple wells

Abstract

A semiconductor device includes a substrate and a gate structure over the substrate. The semiconductor device includes a source in the substrate on a first side of the gate structure. The semiconductor device further includes a drain in the substrate on a second side of the gate structure. The semiconductor device further includes a first well having a first dopant type, wherein the first well contacts at least two surfaces of the source. The semiconductor device further includes a second well having the first dopant type, wherein the second well contacts at least two surfaces of the drain. The semiconductor device further includes a deep well below the first well and below the second well, wherein the second well extends between the first well and the deep well. In some embodiments, the deep well has a second dopant type, and the second dopant type is opposite the first dopant type.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate;   a gate structure over the substrate;   a source in the substrate on a first side of the gate structure;   a drain in the substrate on a second side of the gate structure;   a first well having a first dopant type, wherein the first well contacts at least two surfaces of the source;   a second well having the first dopant type, wherein the second well contacts at least two surfaces of the drain; and   a deep well below the first well and below the second well, wherein the second well extends between the first well and the deep well.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the deep well has a second dopant type, and the second dopant type is opposite the first dopant type. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the second well contacts at least two surfaces of the first well. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the gate structure comprises a variable thickness gate dielectric layer. 
     
     
         5 . The semiconductor device of  claim 1 , wherein an uppermost surface of the second well between the drain and the first well is coplanar with a top surface of the substrate. 
     
     
         6 . The semiconductor device of  claim 1 , wherein an uppermost surface of a portion of the first well under the gate structure is coplanar with a top surface of the substrate. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the first well comprises a different dopant species from a dopant species of the second well. 
     
     
         8 . A semiconductor device comprising:
 a source in a substrate;   a drain in the substrate, wherein the drain is separated from the source;   a first well in the substrate, wherein the first well comprises a first dopant having a first dopant type, and the first well contacts at least two surfaces of the source;   a second well in the substrate, wherein the second well comprises a second dopant having the first dopant type, and the second well physically contacts at least two surfaces of the drain;   a deep well having a depth greater than the first well and the second well, wherein the second well is between the drain and the deep well.   
     
     
         9 . The semiconductor device of  claim 8 , wherein the source comprises a split source. 
     
     
         10 . The semiconductor device of  claim 8 , further comprising a lightly doped drain (LDD) region between the source and the drain. 
     
     
         11 . The semiconductor device of  claim 8 , wherein the first well is separated from the second well. 
     
     
         12 . The semiconductor device of  claim 8 , wherein the deep well directly contacts both the first well and the second well. 
     
     
         13 . The semiconductor device of  claim 8 , further comprising a gate structure over the substrate. 
     
     
         14 . The semiconductor device of  claim 13 , wherein the gate structure overlaps a first portion of the first well and a second portion of the second well. 
     
     
         15 . The semiconductor device of  claim 13 , wherein a portion of the substrate under the gate structure is free of the first well and the second well. 
     
     
         16 . A semiconductor device comprising:
 a source in a substrate;   a drain in the substrate, wherein the drain is separated from the source;   a first well in the substrate, wherein the first well comprises a first dopant having a first dopant type, and the first well contacts at least two surfaces of the source; and   a second well in the substrate, wherein the second well comprises a second dopant having the first dopant type, the second well physically contacts at least two surfaces of the drain, and the second well physically contacts at least two surfaces of the first well.   
     
     
         17 . The semiconductor device of  claim 16 , wherein a depth of the second well is greater than a depth of the first well. 
     
     
         18 . The semiconductor device of  claim 16 , further comprising a gate structure over the substrate. 
     
     
         19 . The semiconductor device of  claim 18 , wherein the gate structure overlaps a first portion of the first well and a second portion of the second well. 
     
     
         20 . The semiconductor device of  claim 16 , wherein an entirety of the substrate between the drain and the first well is occupied by the second well.