US2023378111A1PendingUtilityA1

Semiconductor structures

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: May 30, 2018Filed: Aug 1, 2023Published: Nov 23, 2023
Est. expiryMay 30, 2038(~11.8 yrs left)· nominal 20-yr term from priority
H10W 20/0245H10W 74/00H10W 74/142H10W 90/297H10W 90/291H10W 90/28H10W 72/073H10W 74/15H10W 72/874H10W 72/934H10W 72/952H10W 72/923H10W 72/9413H10W 90/00H10W 70/09H10W 72/07331H10W 72/072H10W 72/07204H10W 70/60H10W 90/722H10W 72/2528H10W 72/07255H10W 72/252H10W 72/241H10W 90/732H10W 72/20H10W 72/0198H10W 74/40H10W 72/30H10W 72/019H10W 74/121H10W 20/023H10W 74/014H10P 72/7416H10P 72/7424H10P 72/743H10P 72/74H10W 70/424H10W 74/111H10W 72/90H10W 74/473H10D 62/115H01L 24/08H01L 24/83H01L 24/33H01L 29/0649H01L 24/03H01L 2924/1811H01L 2924/186
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Claims

Abstract

A semiconductor structure includes a semiconductor substrate, a first electrical connector, a first electrical connector and a dielectric material. The semiconductor substrate has a first surface and a second surface opposite to the first surface. The first electrical connector is disposed over the first surface of the semiconductor substrate. The second electrical connector is electrically connected to the first electrical connector, and the first electrical connector surrounds the second electrical connector. The dielectric material is disposed between the first electrical connector and the second electrical connector.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a semiconductor substrate having a first surface and a second surface opposite to the first surface;   a first electrical connector disposed over the first surface of the semiconductor substrate;   a second electrical connector electrically connected to the first electrical connector, the first electrical connector surrounding the second electrical connector; and   a dielectric material between the first electrical connector and the second electrical connector.   
     
     
         2 . The semiconductor structure according to  claim 1 , wherein the first electrical connector surrounds sidewalls and a surface between the sidewalls of the second electrical connector. 
     
     
         3 . The semiconductor structure according to  claim 1 , wherein a surface of the first electrical connector is substantially coplanar with a surface of the second electrical connector. 
     
     
         4 . The semiconductor structure according to  claim 1 , wherein the dielectric material is in direct contact with the first electrical connector and the second electrical connector. 
     
     
         5 . The semiconductor structure according to  claim 1 , wherein the dielectric material further surrounds the first electrical connector. 
     
     
         6 . The semiconductor structure according to  claim 1 , wherein the dielectric material covers the first electrical connector and the second electrical connector. 
     
     
         7 . The semiconductor structure according to  claim 1 , wherein the second electrical connector is in direct contact with the first electrical connector. 
     
     
         8 . The semiconductor structure according to  claim 1  further comprising a protection layer on sidewalls and the second surface of the semiconductor substrate. 
     
     
         9 . The semiconductor structure according to  claim 8 , wherein a surface of the protection layer is substantially coplanar with the first surface of the semiconductor substrate. 
     
     
         10 . A semiconductor structure, comprising:
 a first substrate, comprising a first bonding structure thereon;   a second substrate, comprising a second bonding structure thereon, the second bonding structure bonded to the first bonding structure; and   a dielectric material surrounding the first bonding structure and the second bonding structure, wherein the dielectric material is in direct contact with the first substrate and the second substrate.   
     
     
         11 . The semiconductor structure according to  claim 10 , wherein the dielectric material is in direct contact with the first bonding structure and the second bonding structure. 
     
     
         12 . The semiconductor structure according to  claim 10 , wherein the first bonding structure comprises a first pad, and the second bonding structure comprises a second pad and a bump between the first pad and the second pad. 
     
     
         13 . The semiconductor structure according to  claim 12 , wherein the first pad surrounds the bump. 
     
     
         14 . The semiconductor structure according to  claim 12 , wherein a surface of the first pad is substantially coplanar with a surface of the bump. 
     
     
         15 . The semiconductor structure according to  claim 12 , wherein the dielectric material is in direct contact with the first pad, the second pad and the bump. 
     
     
         16 . The semiconductor structure according to  claim 10 , wherein a sidewall of the dielectric material is substantially flush with a sidewall of at least one of the first substrate and the second substrate. 
     
     
         17 . A semiconductor structure, comprising:
 a first semiconductor element, comprising a first pad, wherein the first pad comprises an upper portion and a lower portion;   a second semiconductor element, comprising a bump, wherein the bump is in direct contact with the lower portion of the first pad; and   a dielectric material between the bump and the upper portion of the first pad.   
     
     
         18 . The semiconductor structure according to  claim 17 , wherein the dielectric material continuously surrounds the first pad and the bump and covers the first pad and the bump. 
     
     
         19 . The semiconductor structure according to  claim 17 , wherein the upper portion of the first pad surrounds the lower portion of the first pad. 
     
     
         20 . The semiconductor structure according to  claim 17  further comprising a barrier layer surrounding the first pad, wherein a surface of the barrier is substantially coplanar with a surface of the upper portion of the first pad.

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