US2023376666A1PendingUtilityA1

Method of and system for manufacturing semiconductor device

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jan 28, 2021Filed: Jul 31, 2023Published: Nov 23, 2023
Est. expiryJan 28, 2041(~14.5 yrs left)· nominal 20-yr term from priority
H10D 62/121H10D 30/6757H10D 89/10H10D 84/974H10D 86/421H10D 86/60H10D 84/907H10D 30/43H10D 30/6735G06F 30/392H01L 27/0207H01L 27/1222H01L 27/11807G06F 30/398G03F 1/20B82Y 10/00
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Claims

Abstract

A method includes receiving a design rule deck including a predetermined set of widths and spacings associated with active regions. The method also includes providing a cell library including cells having respective active regions, wherein widths and spacings of the active regions are selected from the predetermined set of the design rule deck. The method includes placing a first cell and a second cell from the cell library in a design layout. The first cell has a cell height in a first direction, and a first active region having a first width in the first direction. The second cell has the cell height, and a second active region having a second width in the first direction. The second width is different from the first width. The method further includes manufacturing a semiconductor device according to the design layout.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method, comprising:
 receiving a design rule deck including a predetermined set of widths and spacings associated with active regions;   providing a cell library comprising cells including respective active regions, wherein widths and spacings of the active regions are selected from the predetermined set of the design rule deck;   placing a first cell from the cell library in a design layout, wherein the first cell has a cell height in a first direction, and the first cell comprises a first active region having a first width in the first direction;   placing a second cell from the cell library in the design layout, wherein the second cell has the cell height, and the second cell comprises a second active region having a second width in the first direction, the second width different from the first width; and   manufacturing a semiconductor device according to the design layout.   
     
     
         2 . The method according to  claim 1 , wherein
 the first active region and the second active region overlap in a second direction perpendicular to the first direction.   
     
     
         3 . The method according to  claim 1 , wherein
 the first active region has a first side extending in a second direction perpendicular to the first direction, and   the second active region has a second side extending in the second direction and aligned with the first side.   
     
     
         4 . The method according to  claim 1 , wherein
 the first cell comprises a third active region separated from the first active region in the first direction, the third active region having a third width in the first direction, and   the second cell comprises a fourth active region separated from the second active region in the first direction, the fourth active region having a fourth width in the first direction, the fourth width different from the third width.   
     
     
         5 . The method according to  claim 4 , wherein
 the third active region is separated from the first active region by a first distance,   the fourth active region is separated from the second active region by a second distance, and   a sum of the first width, the third width and the first distance is equal to a sum of the second width, the fourth width and the second distance.   
     
     
         6 . The method according to  claim 4 , wherein
 the third active region is separated from the first active region by a first distance,   the fourth active region is separated from the second active region by a second distance, and   a sum of the first width and the first distance is equal to a sum of the second width and the second distance.   
     
     
         7 . The method according to  claim 4 , wherein
 the third active region is separated from the first active region by a first distance,   the fourth active region is separated from the second active region by a second distance, and   the first distance is equal to the second distance.   
     
     
         8 . The method according to  claim 4 , wherein
 the first width is equal to the third width.   
     
     
         9 . The method according to  claim 1 , wherein
 each of the first active region and the second active region comprises a plurality of nanosheets.   
     
     
         10 . The method according to  claim 1 , wherein
 a distance between an upper cell side of the first cell and a lower side of the first active region is equal to a distance between an upper cell side of the second cell and a lower side of the second active region.   
     
     
         11 . The method according to  claim 1 , wherein
 a distance between a lower cell side of the first cell and an upper side of the first active region is equal to a distance between a lower cell side of the second cell and an upper side of the second active region.   
     
     
         12 . The method according to  claim 1 , wherein
 a difference between the first width and the second width is at least about 2.5% of the first width.   
     
     
         13 . The method according to  claim 1 , wherein
 the first cell further comprises a third active region and a fourth active region,
 the third active region between the first active region and the fourth active region, 
 the third active region having a third width in the first direction, and 
 the fourth active region having a fourth width in the first direction, and 
   the second cell further comprises a fifth active region and a sixth active region,
 the fifth active region between the second active region and the sixth active region, 
 the fifth active region having a fifth width in the first direction, the fifth width different from the third width, and 
 the sixth active region having a sixth width in the first direction, the sixth width different from the fourth width. 
   
     
     
         14 . The method according to  claim 13 , wherein
 the second width is greater than the first width,   the fifth width is greater than the third width, and   the sixth width is greater than the fourth width.   
     
     
         15 . The method according to  claim 13 , wherein
 the first active region has a lower side facing the third active region in the first direction,   the second active region has a lower side facing the fifth active region in the first direction, and   the lower side of the first active region is aligned with the lower side of the second active region.   
     
     
         16 . The method according to  claim 13 , wherein
 the first cell further comprises a seventh active region, the fourth active region between the third active region and the seventh active region,   the second cell further comprises an eighth active region, the sixth active region between the fifth active region and the eighth active region, and   in the first direction, at least one of
 a spacing between facing edges of the first active region and the third active region is equal to a spacing between facing edges of the second active region and the fifth active region, or 
 a spacing between facing edges of the fourth active region and the seventh active region is equal to a spacing between facing edges of the sixth active region and the eighth active region. 
   
     
     
         17 . A method, the method performed at least partially by a processor and comprising:
 receiving a design rule deck including a plurality of widths and a plurality of spacings associated with active regions;   determining a plurality of first values each corresponding to a pair of widths among the plurality of widths;   determining a plurality of second values each corresponding to a pair of spacings among the plurality of spacings;   in response to a first value among the plurality of first values being equal to a second value among the plurality of second values, generating first and second cells including respective active regions, wherein
 the active regions in the first cell have a width in the pair of widths corresponding to the first value, and are spaced from each other by a spacing in the pair of spacings corresponding to the second value, and 
 the active regions in the second cell have another width in the pair of widths corresponding to the first value, and are spaced from each other by another spacing in the pair of spacings corresponding to the second value; and 
   storing the generated first and second cells in a cell library on a non-transitory computer-readable storage medium.   
     
     
         18 . The method according to  claim 17 , wherein
 each first value among of the plurality of first values is twice an absolute value of a difference between the corresponding pair of widths, and   each second value among of the plurality of second values is an absolute value of a difference between the corresponding pair of spacings.   
     
     
         19 . The method according to  claim 17 , further comprising:
 placing at least one of the first cell or the second cell in a design layout; and   controlling manufacturing of a semiconductor device according to the design layout.   
     
     
         20 . A system, comprising a processor configured to:
 perform a circuit simulation of an operation of a design layout comprising a first cell, wherein the first cell has a cell height in a first direction, and the first cell comprises a plurality of first nanosheets having a first width in the first direction;   in response to the circuit simulation failing to meet a design requirement, replace the first cell in the design layout with a second cell to obtain a revised design layout, wherein the second cell has the cell height in the first direction, and the second cell comprises a plurality of second nanosheets having a second width in the first direction, the second width greater than the first width; and   control manufacturing of a semiconductor device according to the revised design layout.

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