US2023367339A1PendingUtilityA1

Methods for preparing void-free coatings for plasma treatment components

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jul 16, 2021Filed: Jul 26, 2023Published: Nov 16, 2023
Est. expiryJul 16, 2041(~15 yrs left)· nominal 20-yr term from priority
G05D 11/13G05B 19/4183B01F 23/69G05B 19/41865B01F 35/83B01F 35/2205G05B 19/41855G05B 17/02H01J 37/32477H01J 37/32082H01J 37/32568C23C 14/083C23C 14/5886C23C 14/024C23C 14/34C23C 14/24C23C 14/0694
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Claims

Abstract

Methods for preparing a void-free protective coating are disclosed herein. The void-free protective coating is used on a dielectric window having a central hole, which is used in a plasma treatment tool. A first protective coating layer is applied to the window, leaving an uncoated annular retreat area around the central hole. The first protective coating layer is polished to produce a flat surface and fill in any voids on the window. A second protective coating layer is then applied upon the flat surface of the first protective coating layer to obtain the void-free coating. This increases process uptime and service lifetime of the dielectric window and the plasma treatment tool.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A plasma treatment tool, comprising:
 a housing;   an upper electrode;   a dielectric window separating the upper electrode from a wafer support surface, the dielectric window including a void-free protective coating oriented toward the wafer support surface and having an uncoated annular retreat area around a central hole therein;   a lower electrode below the wafer support surface; and   a radiofrequency (RF) generator for applying an electromagnetic field within the housing.   
     
     
         2 . The plasma treatment tool of  claim 1 , wherein the dielectric window is made from a ceramic or anodized aluminum. 
     
     
         3 . The plasma treatment tool of  claim 1 , wherein the protective coating comprises Y 2 O 3 , YOF, or YAG. 
     
     
         4 . The plasma treatment tool of  claim 1 , wherein the uncoated annular retreat area has a width of greater than 0 micrometers (μm) to about 2000 μm. 
     
     
         5 . The plasma treatment tool of  claim 1 , wherein the void-free coating has a thickness of about 100 μm or less. 
     
     
         6 . The plasma treatment tool of  claim 1 , wherein the void-free coating has a surface roughness of less than 0.5 μm. 
     
     
         7 . The plasma treatment tool of  claim 1 , wherein the void-free coating has a Vickers hardness (Hv) of about 700 or greater and a crystallinity of about 80% or greater. 
     
     
         8 . A method of plasma treating a semiconducting wafer substrate, comprising:
 placing the semiconducting wafer substrate on a wafer support surface of a plasma treatment tool that comprises a dielectric window located between the wafer support surface and an upper electrode; and   plasma treating the semiconducting wafer substrate;   wherein the dielectric window includes a void-free protective coating oriented toward the wafer support surface and has an uncoated annular retreat area around a central hole therein.   
     
     
         9 . The method of  claim 8 , wherein the dielectric window is made from a ceramic or anodized aluminum or silicon dioxide 
     
     
         10 . The method of  claim 8 , wherein the protective coating comprises Y 2 O 3 , YOF, or YAG. 
     
     
         11 . The method of  claim 8 , wherein the uncoated annular retreat area has a width of greater than 0 micrometers (μm) to about 2000 μm. 
     
     
         12 . The method of  claim 8 , wherein the void-free coating has a thickness of about 100 μm or less. 
     
     
         13 . The method of  claim 8 , wherein the void-free coating has a surface roughness of less than 0.5 μm. 
     
     
         14 . The method of  claim 8 , wherein the void-free coating has a Vickers hardness (Hv) of about 700 or greater. 
     
     
         15 . The method of  claim 8 , wherein the void-free coating has a crystallinity of about 80% or greater. 
     
     
         16 . The method of  claim 8 , wherein the void-free protective coating comprises a first protective coating layer and a second protective coating layer. 
     
     
         17 . A method of plasma treating a semiconducting wafer substrate, comprising:
 placing the semiconducting wafer substrate on a wafer support surface of a plasma treatment tool that comprises a dielectric window located between the wafer support surface and an upper electrode; and   plasma treating the semiconducting wafer substrate;   wherein the dielectric window includes a void-free protective coating oriented toward the wafer support surface and has an uncoated annular retreat area around a central hole therein; and   wherein the void-free protective coating comprises a first protective coating layer and a second protective coating layer.   
     
     
         18 . The method of  claim 17 , wherein the first protective coating layer and the second protective coating layer comprise yttrium. 
     
     
         19 . The method of  claim 18 , wherein the first protective coating layer and the second protective coating layer independently comprise Y 2 O 3 , YOF, or YAG. 
     
     
         20 . The method of  claim 17 , wherein the first protective coating layer and the second protective coating layer are applied using physical vapor deposition.

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