Self-alignment etching of interconnect layers

Abstract

A method for etching a metal containing feature is provided. Using a pattern mask, layers of material are etched to expose a portion of a metal containing feature. At least a portion of the exposed metal containing feature is etched, and is replaced by the growth of a filler dielectric. The etched portion of the metal containing feature and the filler dielectric reduce the unwanted conductivity between adjacent metal containing features.

1 . A device comprising:
 a substrate;   one or more structures disposed on a substrate, each structure comprising a metal liner, and a stack metal;   a first structure of the one or more structures comprising a dielectric cap disposed above the stack metal;   a second structure of the one or more structures adjacent the first structure and comprising a first metal containing feature disposed above the stack metal;   a dielectric liner disposed on sidewalls of each of the one or more structures;   a channel disposed between the first and second structures, the channel having a filler dielectric; and   a dielectric stop layer disposed above the first structure and above at least a portion of the channel.   
     
     
         2 . The device of  claim 1 , further comprising a third structure comprising a second metal containing feature disposed above the stack metal, wherein the second metal containing feature is wider than the first metal containing feature. 
     
     
         3 . The device of  claim 1 , wherein the filler dielectric has air gaps. 
     
     
         4 . The device of  claim 1 , wherein the first metal containing feature is substantially aligned with the stack metal of the second structure. 
     
     
         5 . The device of  claim 1 , wherein a height of the second structure comprising the first metal containing feature is substantially equal to a height of the filler dielectric within the channel. 
     
     
         6 . The device of  claim 1 , wherein the dielectric liner has a thickness of about 10 to about 15 Å. 
     
     
         7 . The device of  claim 1 , wherein the dielectric stop layer includes at least one of silicon carbonitride and silicon carboxide, and the dielectric cap comprises at least one of silicon oxide and silicon nitride. 
     
     
         8 . A device comprising:
 a substrate;   one or more structures disposed on a substrate, each structure comprising a metal liner, and a stack metal;   a first structure of the one or more structures comprising a dielectric cap disposed above the stack metal;   a second structure of the one or more structures comprising a first metal containing feature disposed above the stack metal;   a dielectric liner disposed on sidewalls of each of the one or more structures;   a channel disposed between adjacent structures   a filler dielectric disposed in the channel, the filler dielectric having air gaps; and   a dielectric stop layer disposed above the first structure and above at least a portion of the channel.   
     
     
         9 . The device of  claim 8 , further comprising a third structure comprising a second metal containing feature disposed above the stack metal, wherein the second metal containing feature is wider than the first metal containing feature. 
     
     
         10 . The device of  claim 8 , wherein the first metal containing feature is substantially aligned with the stack metal of the second structure. 
     
     
         11 . The device of  claim 8 , wherein the metal liner is disposed between the substrate and the stack metal. 
     
     
         12 . The device of  claim 9 , further comprising a surface filler disposed above the second metal containing feature. 
     
     
         13 . A device comprising:
 a substrate;   a stack metal;   a first structure disposed on the substrate and having a metal liner disposed between the substrate and a stack metal, the first structure comprising a first metal containing feature disposed above the stack metal;   a second structure disposed on the substrate and having a metal liner disposed between the substrate and a stack metal, the second structure comprising a second metal containing feature disposed above the stack metal;   a first dielectric liner disposed on sidewalls the first structure;   a second dielectric liner disposed on sidewalls the second structure;   a first filler dielectric disposed on the substrate and between the first and second dielectric liners;   a dielectric stop layer disposed above the first filler dielectric.   
     
     
         14 . The device of  claim 13 , further comprising an oxide layer disposed above the stack metal. 
     
     
         15 . The device of  claim 13 , further comprising a second dielectric layer disposed over the dielectric stop layer. 
     
     
         16 . The device of  claim 13 , wherein the first metal containing feature is disposed between the dielectric stop layers of the one the first or second structures. 
     
     
         17 . The device of  claim 13 , further comprising an interconnect layer disposed above the first and second metal containing features. 
     
     
         18 . The device of  claim 17 , wherein the interconnect layer comprises a second metal liner and a second metal stack. 
     
     
         19 . The device of  claim 17 , wherein the interconnect layer comprises a surface filler partially disposed over the first metal containing feature. 
     
     
         20 . The device of  claim 17 , wherein the interconnect layer comprises a surface metal layer.