US2023350142A1PendingUtilityA1

Optical Transceiver and Manufacturing Method Thereof

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jun 27, 2018Filed: Jul 5, 2023Published: Nov 2, 2023
Est. expiryJun 27, 2038(~11.9 yrs left)· nominal 20-yr term from priority
H10W 90/722H10W 72/07236H10W 20/20H10W 74/142H10W 90/284H10W 72/073H10W 72/072H10W 74/15H10W 72/944H10W 72/942H10W 72/29H10W 72/381H10W 72/387H10W 90/724H10W 72/248H10W 72/252H10W 90/792H10W 90/734H10W 90/732H10W 90/00H10W 72/0198H10F 71/137H10F 77/50G02B 6/4255H01L 24/16H01L 24/81G02B 6/4246G02B 6/4243H01L 2224/81815H01L 2224/16148H01L 23/481H04B 10/40G02B 6/12G02B 2006/12166G02B 2006/12133
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Claims

Abstract

A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A three-dimensional packaging method of a photonic-electronic chip, comprising:
 providing a photonic chip with a first surface and a second surface which are opposite to each other;   fixing a dummy chip on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with a single-sided opening, and the opening of the cavity faces and covers the optical coupling interface;   forming an injection molding material layer on the photonic chip on which the dummy chip  100   a  is fixed, so that the injection molding material layer covers the dummy chip and the exposed areas of the first surface of the photonic chip; and   thinning the injection molding material layer and the dummy chip so that the cavity of the dummy chip is connected up and down.   
     
     
         2 . The three-dimensional packaging method of  claim 1 , wherein
 before the step of forming the injection molding material layer, the method further comprising a step of fixing an electronic chip on a first area of the first surface of the photonic chip; and   the step of thinning the injection molding material layer and the dummy chip comprising thinning the injection molding material layer, the electronic chip and the dummy chip.   
     
     
         3 . The three-dimensional packaging method of  claim 2 , wherein
 fixing the second surface of the photonic chip on a package substrate after the step of thinning the injection molding material layer and the dummy chip so that the cavity of the dummy chip is connected up and down.   
     
     
         4 . The three-dimensional packaging method of  claim 3 , wherein
 the photonic chip has an electric channel for electrically connecting the electronic chip to the package substrate, and the electric channel is connected to a first metal bump provided on the first surface of the photonic chip;   the fixing an electronic chip on a first area of the first surface of the photonic chip comprises: flip-chipping the electronic chip to the first area of the first surface of the photonic chip, and bonding a pin of the electronic chip with the first metal bump;   the dummy chip has a dummy chip metal bump on a side with the opening; and   the fixing of the dummy chip on the second area of the first surface of the photonic chip comprises: bonding the dummy chip metal bump with a second metal bump on the photonic chip.   
     
     
         5 . The three-dimensional packaging method of  claim 4 , wherein
 the electric channel in the photonic chip is a conductive via, and the conductive via is connected to an electric connection point on the package substrate by a third metal bump on the second surface of the photonic chip after the second surface of the photonic chip is fixed on the package substrate.   
     
     
         6 . The three-dimensional packaging method of  claim 5 , wherein
 before fixing the electronic chip and/or the dummy chip on the first area of the first surface of the photonic chip, the method further comprises: forming a metal blind via in the photonic chip, wherein the metal blind via cuts through the first surface of the photonic chip, and forming the first metal bump at the metal blind via on the first surface of the photonic chip;   after forming the injection molding material layer on the photonic chip, and before thinning the injection molding material layer and the dummy chip, the method further comprises: thinning the photonic chip from the second surface of the photonic chip so that the metal blind via cuts through the second surface of the photonic chip to form the conductive via, and forming the third metal bump at the conductive via on the second surface of the photonic chip; and   the fixing of the second surface of the photonic chip on the package substrate comprises bonding the third metal bump on the second surface of the photonic chip with the electric connection point on the package substrate.   
     
     
         7 . The three-dimensional packaging method of  claim 2 , wherein,
 thinning the injection molding material layer, the electronic chip and the dummy chip so that the injection molding material layer, the electronic chip and the dummy chip have the same height.   
     
     
         8 . A three-dimensional package structure of a photonic-electronic chip, comprising:
 a photonic chip having a first surface and a second surface opposite to each other;   a dummy chip fixed on a second area of the first surface of the photonic chip, the dummy chip is a wafer on which no photonic components or electronic components are integrated or included, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with upper and lower openings connected up and down, and the lower opening of the cavity faces and covers the optical coupling interface; and   an injection molding material layer located on the first surface of the photonic chip and surrounds the dummy chip, and the cavity is not filled and covered by the injection molding material layer.   
     
     
         9 . The three-dimensional package structure of  claim 8 , further comprising:
 an electronic chip fixed on a first area of the first surface of the photonic chip and surrounded by the injection molding material layer.   
     
     
         10 . The three-dimensional package structure of  claim 9 , further comprising:
 a package substrate on which the second surface of the photonic chip is fixed; and   the photonic chip has an electric channel for electrically connecting the electronic chip to the package substrate, and the electric channel is connected to a first metal bump provided on the first surface of the photonic chip.   
     
     
         11 . The three-dimensional package structure of  claim 10 , wherein
 the electric channel in the photonic chip is a conductive via, and the conductive via cuts through the photonic chip; and   the conductive via is connected to an electric connection point on the package substrate by a third metal bump on the second surface of the photonic chip.   
     
     
         12 . The three-dimensional package structure of  claim 9 , wherein
 the injection molding material layer, the dummy chip and the electronic chip have the same height on a side away from the photonic chip.   
     
     
         13 . The three-dimensional package structure of  claim 8 , wherein
 the optical coupling interface is an optical coupling interface of a grating coupler.   
     
     
         14 . The three-dimensional package structure of  claim 8 , further comprising:
 a fiber array which is coupled to the optical coupling interface through the cavity of the dummy chip.   
     
     
         15 . A three-dimensional packaging method of a photonic-electronic chip, comprising:
 providing a photonic chip with a first surface and a second surface which are opposite to each other;   forming an optical coupling adhesive layer on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the optical coupling adhesive layer covers the optical coupling interface; and   forming an injection molding material layer on the first surface of the photonic chip, the injection molding material layer surrounds the optical coupling adhesive layer, wherein the part of the injection molding material layer above the optical coupling interface has a through hole with upper and lower openings connected up and down, and the coverage area of the lower opening of the through hole covers the optical coupling interface.   
     
     
         16 . The three-dimensional packaging method of  claim 15 , further comprising:
 fixing a dummy chip on the optical coupling adhesive layer;   wherein forming the injection molding material layer on the first surface of the photonic comprises:
 forming the injection molding material layer on the photonic chip on which the dummy chip is fixed, so that the injection molding material layer covers the dummy chip and the exposed areas of the first surface of the photonic chip; and 
 thinning the injection molding material layer so that the part of the injection molding material layer on the dummy chip is removed, and 
   the method further comprises:
 after thinning the injection molding material layer, etching the part of the dummy chip above the optical coupling interface, so that the dummy chip is completely etched out, or the dummy chip is partially etched to form a cavity with upper and lower openings connected up and down, and the coverage area of the lower opening of the cavity covers the optical coupling interface. 
   
     
     
         17 . The three-dimensional packaging method of  claim 16 , further comprising:
 thinning the injection molding material layer and the dummy chip, so that the injection molding material layer and the dummy chip have the same height on the side away from the photonic chip.   
     
     
         18 . The three-dimensional packaging method of  claim 15 , wherein
 before the step of forming the injection molding material layer on the first surface of the photonic chip, the method further comprises a step of fixing the electronic chip on a first area of the first surface of the photonic chip.   
     
     
         19 . The three-dimensional packaging method of  claim 15 , further comprising:
 fixing a dummy chip on the optical coupling adhesive layer; and   removing a portion of the dummy chip while leaving behind a dam portion of the dummy chip.   
     
     
         20 . The three-dimensional packaging method of  claim 19 , further comprising:
 placing an optical fiber into a groove located on the photonic chip.

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