Dual mode supply circuit and method

Abstract

A circuit includes a power supply node, a reference node, an output node, a first transistor coupled between the power supply and output nodes, and an amplifier including a non-inverting input coupled to the power supply node through a first passive device, an inverting input coupled to the reference node through a second passive device, and an output coupled to a gate of the first transistor. A first inverter is coupled between the output and reference nodes and generates a mode control signal responsive to a mode select signal, a first switching device is configured to, responsive to the mode control signal, selectively couple the non-inverting input of the amplifier to the reference node through a third passive device, and a second switching device is configured to, responsive to the mode control signal, selectively couple the inverting input of the amplifier to the output node through a fourth passive device.

What is claimed is: 
     
         1 . A circuit comprising:
 a power supply node;   a reference node;   an output node;   a first transistor coupled between the power supply and output nodes;   an amplifier comprising:
 a non-inverting input coupled to the power supply node through a first passive device; 
 an inverting input coupled to the reference node through a second passive device; and 
 an output coupled to a gate of the first transistor; 
   a first inverter coupled between the output and reference nodes and configured to generate a mode control signal responsive to a mode select signal;   a first switching device configured to, responsive to the mode control signal, selectively couple the non-inverting input of the amplifier to the reference node through a third passive device; and   a second switching device configured to, responsive to the mode control signal, selectively couple the inverting input of the amplifier to the output node through a fourth passive device.   
     
     
         2 . The circuit of  claim 1 , wherein the third passive device is coupled between the non-inverting input of the amplifier and the first switching device. 
     
     
         3 . The circuit of  claim 1 , wherein the fourth passive device is coupled between the inverting input of the amplifier and the second switching device. 
     
     
         4 . The circuit of  claim 1 , further comprising:
 a second inverter coupled in parallel with the first inverter and configured to generate a first output voltage on an output voltage node responsive to the mode control signal; and   a second transistor configured to couple the first transistor to the power supply node responsive to the first output voltage.   
     
     
         5 . The circuit of  claim 4 , further comprising:
 a level shifter coupled between the power supply and output voltage nodes and configured to generate a signal responsive to the mode control signal and a second output voltage on the output node; and   a third switching device configured to couple the output node to the power supply node responsive to the signal.   
     
     
         6 . The circuit of  claim 4 , wherein each of the first and second transistors comprises a p-type transistor. 
     
     
         7 . The circuit of  claim 1 , wherein the first switching device comprises an n-type transistor. 
     
     
         8 . The circuit of  claim 1 , wherein each of the first through fourth passive devices comprises one or more of a resistive device, a diode, or a diode-configured transistor. 
     
     
         9 . The circuit of  claim 1 , wherein the amplifier is coupled to each of the power supply and reference nodes. 
     
     
         10 . The circuit of  claim 1 , further comprising a capacitive device arranged in parallel with the first switching device and the third passive device. 
     
     
         11 . A circuit comprising:
 a power supply node;   a reference node;   a first output node;   a first transistor coupled between the power supply node and the first output node;   an amplifier comprising:
 a non-inverting input coupled to the power supply node through a first passive device; 
 an inverting input coupled to the reference node through a second passive device; and 
 an output coupled to a gate of the first transistor; 
   a first inverter coupled between the first output node and the reference node and configured to generate a first mode control signal responsive to a mode select signal;   a second inverter coupled between the first output node and the reference node and configured to generate a second mode control signal responsive to the first mode control signal;   a second transistor configured to, responsive to the second mode control signal, selectively couple the non-inverting input of the amplifier to the reference node through a third passive device; and   a transmission gate configured to, responsive to the first and second mode control signals, selectively couple the inverting input of the amplifier to the first output node through a fourth passive device,   wherein the circuit is configured to generate a first output voltage on the first output node responsive to the mode select signal and a power supply voltage on the power supply node.   
     
     
         12 . The circuit of  claim 11 , further comprising:
 a third inverter coupled between the first output node and the reference node and configured to generate a second output voltage on a second output node responsive to the first mode control signal.   
     
     
         13 . The circuit of  claim 12 , wherein the third inverter comprises one or more transistors having a total channel size larger than a total channel size of one or more transistors of the second inverter. 
     
     
         14 . The circuit of  claim 13 , wherein the total channel size of the one or more transistors of the third inverter is more than 200 times the total channel size of the one or more transistors of the second inverter. 
     
     
         15 . The circuit of  claim 13 , wherein a total number of the one or more transistors of the third inverter is greater than a total number of the one or more transistors of the second inverter. 
     
     
         16 . The circuit of  claim 11 , wherein each of the first through fourth passive devices comprises one or more of a resistive device, a diode, or a diode-configured transistor. 
     
     
         17 . A method of operating a dual mode circuit, the method comprising:
 receiving a power supply voltage at a power supply node and at an amplifier;   receiving a reference voltage at a reference node and at the amplifier;   using a first inverter to generate a first mode control signal based on a mode select signal;   in response to the first mode control signal:
 using a first switching device to selectively couple a non-inverting input of the amplifier to the reference node through a first passive device, wherein the non-inverting input is coupled to the power supply node through a second passive device, and 
 using a second switching device to selectively couple an inverting input of the amplifier to an output node through a third passive device, wherein the inverting input is coupled to the reference node through a fourth passive device; and 
   outputting a voltage from the amplifier to a first transistor coupled between the power supply and output nodes.   
     
     
         18 . The method of  claim 17 , further comprising:
 using the first transistor to generate a first output voltage on the output node when the first switching device couples the non-inverting input of the amplifier to the reference node and the second switching device couples the inverting input of the amplifier to the output node; and   using a third switching device to couple the output node to the power supply node when the first switching device decouples the non-inverting input of the amplifier from the reference node and the second switching device decouples the inverting input of the amplifier from the output node.   
     
     
         19 . The method of  claim 18 , further comprising:
 using a second inverter to generate a second mode control signal complementary to the first mode control signal,   wherein one or both of the using the first switching device to selectively couple the non-inverting input of the amplifier to the reference node or the using the second switching device to selectively couple the inverting input of the amplifier to the output node is in response to the second mode control signal.   
     
     
         20 . The method of  claim 19 , further comprising:
 using a third inverter to generate a second output voltage in response to the first mode control signal,   wherein the using the third inverter comprises the third inverter having a greater total number of transistors than a total number of transistors of the second inverter.